Thomas S. Giampaolo Ii

Array ( [id] => 17517095 [patent_doc_number] => 11296256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Light-emitting diode [patent_app_type] => utility [patent_app_number] => 16/883585 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17326450 [patent_doc_number] => 11217475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Wafer table with dynamic support pins [patent_app_type] => utility [patent_app_number] => 16/871970 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16256690 [patent_doc_number] => 20200266065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => METHOD AND STRUCTURE OF MIDDLE LAYER REMOVAL [patent_app_type] => utility [patent_app_number] => 16/869859 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869859 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16668696 [patent_doc_number] => 10937955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Memory element and memory device [patent_app_type] => utility [patent_app_number] => 16/853157 [patent_app_country] => US [patent_app_date] => 2020-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 15366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18205509 [patent_doc_number] => 11587914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => LED chip and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 16/852522 [patent_app_country] => US [patent_app_date] => 2020-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 13123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16210392 [patent_doc_number] => 20200243382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => Methods for Wordline Separation in 3D-NAND Devices [patent_app_type] => utility [patent_app_number] => 16/848754 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16255272 [patent_doc_number] => 20200264646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => POWER MEASUREMENT IN A TWO-WIRE LOAD CONTROL DEVICE [patent_app_type] => utility [patent_app_number] => 16/832154 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832154 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17166358 [patent_doc_number] => 11152471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-19 [patent_title] => 2-dimensional electron gas and 2-dimensional hole gas junction based semiconductor device [patent_app_type] => utility [patent_app_number] => 16/830324 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11555 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16830324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18199526 [patent_doc_number] => 20230053045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/795481 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17795481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18199526 [patent_doc_number] => 20230053045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/795481 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17795481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16332402 [patent_doc_number] => 20200303368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SILICON-CONTROLLED-RECTIFIER ELECTROSTATIC PROTECTION STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/822456 [patent_app_country] => US [patent_app_date] => 2020-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16822456 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18891204 [patent_doc_number] => 11869983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Low voltage/power junction FET with all-around junction gate [patent_app_type] => utility [patent_app_number] => 16/817571 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6281 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16741769 [patent_doc_number] => 10966733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Implant specific drill bit in surgical kit for cartilage repair [patent_app_type] => utility [patent_app_number] => 16/802865 [patent_app_country] => US [patent_app_date] => 2020-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 78 [patent_no_of_words] => 21813 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16802865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17055783 [patent_doc_number] => 20210265217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/800834 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23753 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17366028 [patent_doc_number] => 11233059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Construction of integrated circuitry, DRAM circuitry, a method of forming a conductive line construction, a method of forming memory circuitry, and a method of forming DRAM circuitry [patent_app_type] => utility [patent_app_number] => 16/796470 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 6507 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16796470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17319413 [patent_doc_number] => 20210408463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => Display Structure [patent_app_type] => utility [patent_app_number] => 16/644201 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16644201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17677110 [patent_doc_number] => 20220190277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => FLEXIBLE COVER PLATE, FLEXIBLE DISPLAY DEVICE, AND MANUFACTURING METHOD OF FLEXIBLE COVER PLATE [patent_app_type] => utility [patent_app_number] => 16/651240 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16651240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16020993 [patent_doc_number] => 20200185340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/791798 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791798 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16896279 [patent_doc_number] => 11037841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Light emitting diode (LED) test apparatus and method of manufacture [patent_app_type] => utility [patent_app_number] => 16/788104 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 34 [patent_no_of_words] => 10951 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16788104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17424477 [patent_doc_number] => 11257941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => High electron mobility transistor with doped semiconductor region in gate structure [patent_app_type] => utility [patent_app_number] => 16/774126 [patent_app_country] => US [patent_app_date] => 2020-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 8915 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774126 [rel_patent_id] =>[rel_patent_doc_number] =>)