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Thong Quoc Le

Examiner (ID: 5725, Phone: (571)272-1783 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2827
Total Applications
2906
Issued Applications
2764
Pending Applications
98
Abandoned Applications
83

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19531471 [patent_doc_number] => 20240355373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => METHOD AND DEVICE FOR ADJUSTING PHASE OF BIDIRECTIONAL DATA STROBE (DQS) SIGNAL [patent_app_type] => utility [patent_app_number] => 18/757528 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18757528 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/757528
METHOD AND DEVICE FOR ADJUSTING PHASE OF BIDIRECTIONAL DATA STROBE (DQS) SIGNAL Jun 27, 2024 Pending
Array ( [id] => 20010875 [patent_doc_number] => 20250149097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => MEMORY ARRAY PROGRAMMING METHOD USING BITLINES AND MEMORY DEVICE FOR PERFORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/753659 [patent_app_country] => US [patent_app_date] => 2024-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5431 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18753659 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/753659
MEMORY ARRAY PROGRAMMING METHOD USING BITLINES AND MEMORY DEVICE FOR PERFORMING THE SAME Jun 24, 2024 Pending
Array ( [id] => 19973887 [patent_doc_number] => 12342520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 18/749271 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 14214 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749271
Semiconductor storage device Jun 19, 2024 Issued
Array ( [id] => 19482625 [patent_doc_number] => 20240330667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => PROCESSING-IN-MEMORY OPERATIONS, AND RELATED APPARATUSES, SYSTEMS, AND METHODS [patent_app_type] => utility [patent_app_number] => 18/738644 [patent_app_country] => US [patent_app_date] => 2024-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18738644 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/738644
PROCESSING-IN-MEMORY OPERATIONS, AND RELATED APPARATUSES, SYSTEMS, AND METHODS Jun 9, 2024 Pending
Array ( [id] => 19467681 [patent_doc_number] => 20240321351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => WRITE ERROR COUNTER FOR MEDIA MANAGEMENT IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/731706 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731706
WRITE ERROR COUNTER FOR MEDIA MANAGEMENT IN A MEMORY DEVICE Jun 2, 2024 Pending
Array ( [id] => 19467659 [patent_doc_number] => 20240321329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SELECTIVE ACCESS FOR GROUPED MEMORY DIES [patent_app_type] => utility [patent_app_number] => 18/680550 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680550 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680550
SELECTIVE ACCESS FOR GROUPED MEMORY DIES May 30, 2024 Pending
Array ( [id] => 19467685 [patent_doc_number] => 20240321355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/678802 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/678802
PROGRAM CURRENT CONTROLLER AND SENSE CIRCUIT FOR CROSS-POINT MEMORY DEVICES May 29, 2024 Pending
Array ( [id] => 19435769 [patent_doc_number] => 20240304267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => ARTIFICIAL INTELLIGENCE PROCESSING DEVICE AND TRAINING INFERENCE METHOD FOR ARTIFICIAL INTELLIGENCE PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 18/670281 [patent_app_country] => US [patent_app_date] => 2024-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670281 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/670281
ARTIFICIAL INTELLIGENCE PROCESSING DEVICE AND TRAINING INFERENCE METHOD FOR ARTIFICIAL INTELLIGENCE PROCESSING DEVICE May 20, 2024 Pending
Array ( [id] => 20036062 [patent_doc_number] => 20250174284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/665146 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665146 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665146
MEMORY DEVICE AND METHOD OF OPERATING THE SAME May 14, 2024 Pending
Array ( [id] => 19604446 [patent_doc_number] => 20240395326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => MEMORY ARRAY STRUCTURES AND METHODS OF THEIR FABRICATION [patent_app_type] => utility [patent_app_number] => 18/652288 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652288 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652288
MEMORY ARRAY STRUCTURES AND METHODS OF THEIR FABRICATION Apr 30, 2024 Pending
Array ( [id] => 19391281 [patent_doc_number] => 20240281151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => APPARATUS WITH POST-MANUFACTURING DATA UPDATE MECHANISM AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/651032 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651032 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/651032
Apparatus with post-manufacturing data update mechanism and methods for operating the same Apr 29, 2024 Issued
Array ( [id] => 20132071 [patent_doc_number] => 12374388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Buffered dynamic random access memory device [patent_app_type] => utility [patent_app_number] => 18/649739 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4926 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649739
Buffered dynamic random access memory device Apr 28, 2024 Issued
Array ( [id] => 20132087 [patent_doc_number] => 12374404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Algorithm qualifier commands [patent_app_type] => utility [patent_app_number] => 18/642253 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1055 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18642253 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/642253
Algorithm qualifier commands Apr 21, 2024 Issued
Array ( [id] => 19546114 [patent_doc_number] => 20240363150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => WORDLINE CONTACT FORMATION FOR NAND DEVICE [patent_app_type] => utility [patent_app_number] => 18/640422 [patent_app_country] => US [patent_app_date] => 2024-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18640422 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/640422
WORDLINE CONTACT FORMATION FOR NAND DEVICE Apr 18, 2024 Pending
Array ( [id] => 19515406 [patent_doc_number] => 20240347092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => Ferroelectric Latch Adapted to Replace a Conventional Latch [patent_app_type] => utility [patent_app_number] => 18/637291 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637291 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/637291
Ferroelectric Latch Adapted to Replace a Conventional Latch Apr 15, 2024 Pending
Array ( [id] => 19574855 [patent_doc_number] => 20240379147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => Proactive Usage-Based Disturbance Mitigation based on Resource Availability [patent_app_type] => utility [patent_app_number] => 18/635739 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635739
Proactive Usage-Based Disturbance Mitigation based on Resource Availability Apr 14, 2024 Pending
Array ( [id] => 19347883 [patent_doc_number] => 20240256847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => ANALOG NEUROMORPHIC CIRCUITS FOR DOT-PRODUCT OPERATION IMPLEMENTING RESISTIVE MEMORIES [patent_app_type] => utility [patent_app_number] => 18/631003 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631003 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631003
ANALOG NEUROMORPHIC CIRCUITS FOR DOT-PRODUCT OPERATION IMPLEMENTING RESISTIVE MEMORIES Apr 8, 2024 Issued
Array ( [id] => 20026926 [patent_doc_number] => 20250165148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => PREDICTION OF DATA RETENTION DEGRADATION OF A NON-VOLATILE MEMORY DEVICE BASED ON A MACHINE LEARNING ALGORITHM [patent_app_type] => utility [patent_app_number] => 18/622866 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622866 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/622866
PREDICTION OF DATA RETENTION DEGRADATION OF A NON-VOLATILE MEMORY DEVICE BASED ON A MACHINE LEARNING ALGORITHM Mar 28, 2024 Pending
Array ( [id] => 19285363 [patent_doc_number] => 20240221840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MULTI-PROGRAM OF MEMORY CELLS WITHOUT INTERVENING ERASE OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/604858 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604858 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604858
MULTI-PROGRAM OF MEMORY CELLS WITHOUT INTERVENING ERASE OPERATIONS Mar 13, 2024 Pending
Array ( [id] => 20317956 [patent_doc_number] => 12456511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Memory circuit and method of operating same [patent_app_type] => utility [patent_app_number] => 18/601367 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 22775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601367
Memory circuit and method of operating same Mar 10, 2024 Issued
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