Search

Thong Quoc Le

Examiner (ID: 13837, Phone: (571)272-1783 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2827
Total Applications
2901
Issued Applications
2782
Pending Applications
65
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18156255 [patent_doc_number] => 11569249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Anti-fuse device method and layout [patent_app_type] => utility [patent_app_number] => 17/317162 [patent_app_country] => US [patent_app_date] => 2021-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317162 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317162
Anti-fuse device method and layout May 10, 2021 Issued
Array ( [id] => 17009184 [patent_doc_number] => 20210240345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/238822 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238822 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/238822
Nonvolatile semiconductor memory device Apr 22, 2021 Issued
Array ( [id] => 18379441 [patent_doc_number] => 20230154530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => ELECTRONIC DEVICE AND ELECTRONIC DEVICE CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/919937 [patent_app_country] => US [patent_app_date] => 2021-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17919937 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/919937
ELECTRONIC DEVICE AND ELECTRONIC DEVICE CONTROL METHOD Apr 21, 2021 Abandoned
Array ( [id] => 17900507 [patent_doc_number] => 20220310169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => MEMORY DEVICE AND ERASE OPERATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/231984 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/231984
Memory device and erase operation thereof Apr 14, 2021 Issued
Array ( [id] => 16981194 [patent_doc_number] => 20210225431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => APPARATUSES AND METHODS FOR STAGGERED TIMING OF SKIPPED REFRESH OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/226975 [patent_app_country] => US [patent_app_date] => 2021-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17226975 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/226975
Apparatuses and methods for staggered timing of skipped refresh operations Apr 8, 2021 Issued
Array ( [id] => 17144972 [patent_doc_number] => 20210312985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERISTICS OF RESISTIVE MEMORY ON A CHIP [patent_app_type] => utility [patent_app_number] => 17/223824 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223824 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223824
Distinct chip identifier sequence utilizing unclonable characteristics of resistive memory on a chip Apr 5, 2021 Issued
Array ( [id] => 17158785 [patent_doc_number] => 20210319836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => METHOD FOR WRITING IN A NON-VOLATILE MEMORY ACCORDING TO THE AGEING OF THE MEMORY CELLS AND CORRESPONDING INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/224024 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17224024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/224024
Method for writing in a non-volatile memory according to the ageing of the memory cells and corresponding integrated circuit Apr 5, 2021 Issued
Array ( [id] => 18031790 [patent_doc_number] => 11514985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Spike current suppression in a memory array [patent_app_type] => utility [patent_app_number] => 17/222864 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222864 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222864
Spike current suppression in a memory array Apr 4, 2021 Issued
Array ( [id] => 17302740 [patent_doc_number] => 20210398579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => ONE TIME PROGRAMMABLE (OTP) MAGNETORESISTIVE RANDOM-ACCESS MEMORY (MRAM) [patent_app_type] => utility [patent_app_number] => 17/222213 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222213
One time programmable (OTP) magnetoresistive random-access memory (MRAM) Apr 4, 2021 Issued
Array ( [id] => 17870448 [patent_doc_number] => 20220293185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => MEMORY CONTROL METHOD, MEMORY STORAGE DEVICE, AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 17/214958 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17214958 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/214958
Memory control method, memory storage device, and memory control circuit unit Mar 28, 2021 Issued
Array ( [id] => 16964739 [patent_doc_number] => 20210216238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => HIGH PERFORMANCE MEMORY MODULE WITH REDUCED LOADING [patent_app_type] => utility [patent_app_number] => 17/214770 [patent_app_country] => US [patent_app_date] => 2021-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17214770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/214770
High performance memory module with reduced loading Mar 25, 2021 Issued
Array ( [id] => 19765721 [patent_doc_number] => 12224019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Cache processes with adaptive dynamic start voltage calculation for memory devices [patent_app_type] => utility [patent_app_number] => 17/213150 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 26744 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213150 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/213150
Cache processes with adaptive dynamic start voltage calculation for memory devices Mar 24, 2021 Issued
Array ( [id] => 17847726 [patent_doc_number] => 11437110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-06 [patent_title] => Erase tail comparator scheme [patent_app_type] => utility [patent_app_number] => 17/212871 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 15181 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212871 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212871
Erase tail comparator scheme Mar 24, 2021 Issued
Array ( [id] => 18105295 [patent_doc_number] => 11545189 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Apparatuses and methods for different IO widths for stacked die [patent_app_type] => utility [patent_app_number] => 17/210922 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6616 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17210922 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/210922
Apparatuses and methods for different IO widths for stacked die Mar 23, 2021 Issued
Array ( [id] => 17085224 [patent_doc_number] => 20210280231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => MEMORY CELL IMPRINT AVOIDANCE [patent_app_type] => utility [patent_app_number] => 17/211246 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211246 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211246
Memory cell imprint avoidance Mar 23, 2021 Issued
Array ( [id] => 18235765 [patent_doc_number] => 11600329 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-07 [patent_title] => Systems and methods for runtime analog sanitization of memory [patent_app_type] => utility [patent_app_number] => 17/207260 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7227 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17207260 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/207260
Systems and methods for runtime analog sanitization of memory Mar 18, 2021 Issued
Array ( [id] => 18119099 [patent_doc_number] => 11550492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Semiconductor memory device, controller, and memory system having semiconductor memory device and controller [patent_app_type] => utility [patent_app_number] => 17/204152 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 11864 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204152 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/204152
Semiconductor memory device, controller, and memory system having semiconductor memory device and controller Mar 16, 2021 Issued
Array ( [id] => 17870471 [patent_doc_number] => 20220293208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => VOLTAGE CALIBRATION SCANS TO REDUCE MEMORY DEVICE OVERHEAD [patent_app_type] => utility [patent_app_number] => 17/198755 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9357 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198755 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198755
Voltage calibration scans to reduce memory device overhead Mar 10, 2021 Issued
Array ( [id] => 17188533 [patent_doc_number] => 20210335418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/198375 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 42795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198375 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198375
Semiconductor memory device Mar 10, 2021 Issued
Array ( [id] => 17855308 [patent_doc_number] => 20220285351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => MULTIPLEXOR FOR A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/190705 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11288 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190705
Multiplexor for a semiconductor device Mar 2, 2021 Issued
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