Search

Thong Quoc Le

Examiner (ID: 5725, Phone: (571)272-1783 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2827
Total Applications
2906
Issued Applications
2764
Pending Applications
98
Abandoned Applications
83

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19252492 [patent_doc_number] => 20240203489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => INTEGRATED CIRCUIT DEVICE INCLUDING AN SRAM PORTION HAVING END POWER SELECT CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/592833 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592833 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592833
Integrated circuit device including an SRAM portion having end power select circuits Feb 29, 2024 Issued
Array ( [id] => 19252471 [patent_doc_number] => 20240203468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/593635 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593635
Adaptive write operations for a memory device Feb 29, 2024 Issued
Array ( [id] => 19771886 [patent_doc_number] => 20250053312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/587279 [patent_app_country] => US [patent_app_date] => 2024-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18587279 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/587279
NONVOLATILE MEMORY Feb 25, 2024 Pending
Array ( [id] => 20043033 [patent_doc_number] => 20250181255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => PROGRAM SPEED COMPENSATION FOR NON-VOLATILE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/586350 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18586350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/586350
PROGRAM SPEED COMPENSATION FOR NON-VOLATILE MEMORY CELLS Feb 22, 2024 Pending
Array ( [id] => 20345804 [patent_doc_number] => 12469539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Apparatus with refresh management mechanism [patent_app_type] => utility [patent_app_number] => 18/583527 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4427 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583527 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/583527
Apparatus with refresh management mechanism Feb 20, 2024 Issued
Array ( [id] => 19696100 [patent_doc_number] => 20250014645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => NONVOLATILE MEMORY DEVICES AND MEMORY PACKAGES INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/443463 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22570 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443463
NONVOLATILE MEMORY DEVICES AND MEMORY PACKAGES INCLUDING THE SAME Feb 15, 2024 Pending
Array ( [id] => 20373992 [patent_doc_number] => 12481425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Determining reference voltage offsets for read operations in a memory system [patent_app_type] => utility [patent_app_number] => 18/429139 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429139 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/429139
Determining reference voltage offsets for read operations in a memory system Jan 30, 2024 Issued
Array ( [id] => 20139168 [patent_doc_number] => 20250246212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => MAGNETIC DOMAIN WALL MOTION ELEMENT AND MAGNETIC ARRAY [patent_app_type] => utility [patent_app_number] => 18/426708 [patent_app_country] => US [patent_app_date] => 2024-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18426708 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/426708
Magnetic domain wall motion element and magnetic array Jan 29, 2024 Issued
Array ( [id] => 19500127 [patent_doc_number] => 20240339145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/422770 [patent_app_country] => US [patent_app_date] => 2024-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18422770 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/422770
Memory device and operation method thereof Jan 24, 2024 Issued
Array ( [id] => 19160853 [patent_doc_number] => 20240153560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/414524 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414524 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414524
Nonvolatile semiconductor memory device Jan 16, 2024 Issued
Array ( [id] => 20217624 [patent_doc_number] => 12414293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Antifuse-type one time programming memory with forksheet transistors [patent_app_type] => utility [patent_app_number] => 18/413085 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 13230 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413085 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413085
Antifuse-type one time programming memory with forksheet transistors Jan 15, 2024 Issued
Array ( [id] => 19850809 [patent_doc_number] => 20250096160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => GENERATION OF PHYSICALLY UNCLONABLE FUNCTION USING ONE-TIME-PROGRAMMABLE MEMORY DEVICES WITH BACK-END-OF-LINE TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/412505 [patent_app_country] => US [patent_app_date] => 2024-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18412505 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/412505
GENERATION OF PHYSICALLY UNCLONABLE FUNCTION USING ONE-TIME-PROGRAMMABLE MEMORY DEVICES WITH BACK-END-OF-LINE TRANSISTORS Jan 12, 2024 Pending
Array ( [id] => 19806059 [patent_doc_number] => 20250071984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => EFUSE CELLS WITH BACKSIDE POWER RAILS [patent_app_type] => utility [patent_app_number] => 18/410190 [patent_app_country] => US [patent_app_date] => 2024-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18410190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/410190
EFUSE CELLS WITH BACKSIDE POWER RAILS Jan 10, 2024 Pending
Array ( [id] => 19145989 [patent_doc_number] => 20240145004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => THREE-DIMENSIONAL FLASH MEMORY AND OPERATION METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/407533 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407533 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407533
Three-dimensional flash memory and operation method therefor Jan 8, 2024 Issued
Array ( [id] => 19160846 [patent_doc_number] => 20240153553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => NON-VOLATILE PHASE-CHANGE MEMORY DEVICE INCLUDING A DISTRIBUTED ROW DECODER WITH N-CHANNEL MOSFET TRANSISTORS AND RELATED ROW DECODING METHOD [patent_app_type] => utility [patent_app_number] => 18/406097 [patent_app_country] => US [patent_app_date] => 2024-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406097 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406097
Non-volatile phase-change memory device including a distributed row decoder with n-channel MOSFET transistors and related row decoding method Jan 5, 2024 Issued
Array ( [id] => 20268579 [patent_doc_number] => 12439591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Memory device, integrated circuit and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 18/403730 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 945 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/403730
Memory device, integrated circuit and manufacturing method of the same Jan 3, 2024 Issued
Array ( [id] => 19130651 [patent_doc_number] => 20240136004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => FUSE MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/396118 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396118 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/396118
Fuse memory circuit Dec 25, 2023 Issued
Array ( [id] => 19130651 [patent_doc_number] => 20240136004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => FUSE MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/396118 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396118 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/396118
Fuse memory circuit Dec 25, 2023 Issued
Array ( [id] => 20063068 [patent_doc_number] => 20250201290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => HEUSLER ALLOY BASED SPIN-TRANSFER-TORQUE MAGNETIC TUNNEL JUNCTIONS FOR FLASH MEMORY AND THE LIKE [patent_app_type] => utility [patent_app_number] => 18/541092 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18541092 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/541092
HEUSLER ALLOY BASED SPIN-TRANSFER-TORQUE MAGNETIC TUNNEL JUNCTIONS FOR FLASH MEMORY AND THE LIKE Dec 14, 2023 Pending
Array ( [id] => 20359957 [patent_doc_number] => 12475961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Fractal analog random access memory [patent_app_type] => utility [patent_app_number] => 18/541598 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 1076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18541598 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/541598
Fractal analog random access memory Dec 14, 2023 Issued
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