Search

Thong Quoc Le

Examiner (ID: 18725, Phone: (571)272-1783 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2818
Total Applications
2911
Issued Applications
2782
Pending Applications
78
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14109551 [patent_doc_number] => 20190096451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => DQS-OFFSET AND READ-RTT-DISABLE EDGE CONTROL [patent_app_type] => utility [patent_app_number] => 16/200443 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200443 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200443
DQS-offset and read-RTT-disable edge control Nov 25, 2018 Issued
Array ( [id] => 14858709 [patent_doc_number] => 10418088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Power reduction technique during read/write bursts [patent_app_type] => utility [patent_app_number] => 16/193825 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193825 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193825
Power reduction technique during read/write bursts Nov 15, 2018 Issued
Array ( [id] => 14163533 [patent_doc_number] => 20190108869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => MITIGATING LINE-TO-LINE CAPACITIVE COUPLING IN A MEMORY DIE [patent_app_type] => utility [patent_app_number] => 16/189434 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16189434 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/189434
Mitigating line-to-line capacitive coupling in a memory die Nov 12, 2018 Issued
Array ( [id] => 16034525 [patent_doc_number] => 10679689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Offset cancellation for latching in a memory device [patent_app_type] => utility [patent_app_number] => 16/184823 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14654 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184823 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184823
Offset cancellation for latching in a memory device Nov 7, 2018 Issued
Array ( [id] => 13962797 [patent_doc_number] => 20190057743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/167355 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16167355 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/167355
Semiconductor memory device and operating method thereof Oct 21, 2018 Issued
Array ( [id] => 14603057 [patent_doc_number] => 10354722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/145342 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6235 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145342 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145342
Semiconductor device Sep 27, 2018 Issued
Array ( [id] => 13931143 [patent_doc_number] => 20190049087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => Memory Arrays [patent_app_type] => utility [patent_app_number] => 16/137971 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137971 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137971
Memory arrays Sep 20, 2018 Issued
Array ( [id] => 15580141 [patent_doc_number] => 10580462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Memory device, memory system and electronic device [patent_app_type] => utility [patent_app_number] => 16/129948 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12239 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129948 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129948
Memory device, memory system and electronic device Sep 12, 2018 Issued
Array ( [id] => 14752513 [patent_doc_number] => 20190259430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/130034 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16130034 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/130034
Memory device Sep 12, 2018 Issued
Array ( [id] => 15443009 [patent_doc_number] => 20200035688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => MEMORY ARRAY AND SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 16/125786 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125786 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125786
Memory array and semiconductor chip Sep 9, 2018 Issued
Array ( [id] => 15488013 [patent_doc_number] => 10559361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Semiconductor device and control method [patent_app_type] => utility [patent_app_number] => 16/126516 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 6917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126516 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126516
Semiconductor device and control method Sep 9, 2018 Issued
Array ( [id] => 15624931 [patent_doc_number] => 20200082870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => ELECTRONIC DEVICE WITH A SENSE AMP MECHANISM [patent_app_type] => utility [patent_app_number] => 16/125326 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125326 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125326
Electronic device with a sense amp mechanism Sep 6, 2018 Issued
Array ( [id] => 14475117 [patent_doc_number] => 20190189204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => MEMORY SYSTEM INCLUDING MEMORY DEVICE AND MEMORY CONTROLLER, AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/124882 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16124882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/124882
Memory system including memory device and memory controller, and operation method thereof Sep 6, 2018 Issued
Array ( [id] => 13878241 [patent_doc_number] => 20190035461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => DATA STATE SYNCHRONIZATION [patent_app_type] => utility [patent_app_number] => 16/124222 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16124222 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/124222
Data state synchronization Sep 6, 2018 Issued
Array ( [id] => 14875507 [patent_doc_number] => 20190287995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/118598 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118598 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118598
Semiconductor memory device Aug 30, 2018 Issued
Array ( [id] => 14078823 [patent_doc_number] => 20190088299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => RESISTIVE MEMORY DEVICE INCLUDING REFERENCE CELL AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/118774 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118774 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118774
Resistive memory device including reference cell and operating method thereof Aug 30, 2018 Issued
Array ( [id] => 14858719 [patent_doc_number] => 10418093 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-17 [patent_title] => DRAM sense amplifier active matching fill features for gap equivalence systems and methods [patent_app_type] => utility [patent_app_number] => 16/118798 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6495 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118798 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118798
DRAM sense amplifier active matching fill features for gap equivalence systems and methods Aug 30, 2018 Issued
Array ( [id] => 13740135 [patent_doc_number] => 20180374537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => APPARATUSES AND METHODS FOR EFFICIENT WRITE IN A CROSS-POINT ARRAY [patent_app_type] => utility [patent_app_number] => 16/118031 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118031 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118031
Apparatuses and methods for efficient write in a cross-point array Aug 29, 2018 Issued
Array ( [id] => 13995287 [patent_doc_number] => 20190066801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => CHARACTERIZING AND OPERATING A NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/116806 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16116806 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/116806
Characterizing and operating a non-volatile memory device Aug 28, 2018 Issued
Array ( [id] => 15108341 [patent_doc_number] => 10475500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Memory cell imprint avoidance [patent_app_type] => utility [patent_app_number] => 16/111021 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 18028 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111021
Memory cell imprint avoidance Aug 22, 2018 Issued
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