Search

Thong Quoc Le

Examiner (ID: 5725, Phone: (571)272-1783 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2827
Total Applications
2906
Issued Applications
2764
Pending Applications
98
Abandoned Applications
83

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19483703 [patent_doc_number] => 20240331745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SYSTEMS AND METHODS FOR FLEXIBLE BANK ADDRESSING IN DIGITAL COMPUTING-IN-MEMORY (DCIM) [patent_app_type] => utility [patent_app_number] => 18/469742 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469742 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/469742
SYSTEMS AND METHODS FOR FLEXIBLE BANK ADDRESSING IN DIGITAL COMPUTING-IN-MEMORY (DCIM) Sep 18, 2023 Issued
Array ( [id] => 19958449 [patent_doc_number] => 12328880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Hierarchical memory architecture including on-chip multi-bank non-volatile memory with low leakage and low latency [patent_app_type] => utility [patent_app_number] => 18/470314 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470314 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/470314
Hierarchical memory architecture including on-chip multi-bank non-volatile memory with low leakage and low latency Sep 18, 2023 Issued
Array ( [id] => 20119564 [patent_doc_number] => 12369302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Memory device using semiconductor element [patent_app_type] => utility [patent_app_number] => 18/469971 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 2446 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469971 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/469971
Memory device using semiconductor element Sep 18, 2023 Issued
Array ( [id] => 19941971 [patent_doc_number] => 12314100 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Automatic vent for SSD cooling enhancement [patent_app_type] => utility [patent_app_number] => 18/368988 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 1162 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368988 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368988
Automatic vent for SSD cooling enhancement Sep 14, 2023 Issued
Array ( [id] => 19483746 [patent_doc_number] => 20240331788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METHOD OF MEASURING REFRACTIVE INDEX OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CLASSIFYING PRODUCT GROUP USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/466561 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18466561 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/466561
Method of measuring refractive index of semiconductor memory device and method of classifying product group using the same Sep 12, 2023 Issued
Array ( [id] => 19780414 [patent_doc_number] => 12229447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Nonvolatile semiconductor memory [patent_app_type] => utility [patent_app_number] => 18/242521 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 11480 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18242521 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/242521
Nonvolatile semiconductor memory Sep 5, 2023 Issued
Array ( [id] => 19085931 [patent_doc_number] => 20240112732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/460493 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460493 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460493
Memory device Aug 31, 2023 Issued
Array ( [id] => 20215973 [patent_doc_number] => 12412627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Flash memory with high integration [patent_app_type] => utility [patent_app_number] => 18/459429 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 2537 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459429 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459429
Flash memory with high integration Aug 31, 2023 Issued
Array ( [id] => 19589361 [patent_doc_number] => 20240386918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/457351 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18457351 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/457351
Semiconductor device and manufacturing method of a semiconductor device Aug 28, 2023 Issued
Array ( [id] => 19010253 [patent_doc_number] => 20240074324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => MAGNETIC DEVICE AND MAGNETIC STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/456397 [patent_app_country] => US [patent_app_date] => 2023-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18456397 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/456397
Magnetic device and magnetic storage device Aug 24, 2023 Issued
Array ( [id] => 19116130 [patent_doc_number] => 20240127880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => CONTROL CIRCUIT AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/451069 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18451069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/451069
Control circuit and memory Aug 15, 2023 Issued
Array ( [id] => 18820766 [patent_doc_number] => 20230395107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => ENHANCED IO INTERFACE FOR PLC PROGRAM AND PROGRAM-SUSPEND-RESUME OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/233852 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233852 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233852
Enhanced IO interface for plc program and program-suspend-resume operations Aug 13, 2023 Issued
Array ( [id] => 20375074 [patent_doc_number] => 12482516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Circuit for receiving data and memory [patent_app_type] => utility [patent_app_number] => 18/448944 [patent_app_country] => US [patent_app_date] => 2023-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5917 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 502 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448944 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448944
Circuit for receiving data and memory Aug 12, 2023 Issued
Array ( [id] => 19646247 [patent_doc_number] => 20240420767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => VPASS AUTO LAYER COMPENSATION IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/232609 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13914 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232609 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/232609
VPASS auto layer compensation in a memory device Aug 9, 2023 Issued
Array ( [id] => 19906305 [patent_doc_number] => 12283317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Memory sense amplifier with precharge [patent_app_type] => utility [patent_app_number] => 18/448067 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448067 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448067
Memory sense amplifier with precharge Aug 9, 2023 Issued
Array ( [id] => 20132064 [patent_doc_number] => 12374381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Dynamic memory and control method for power down scheme [patent_app_type] => utility [patent_app_number] => 18/366687 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366687 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366687
Dynamic memory and control method for power down scheme Aug 7, 2023 Issued
Array ( [id] => 19546132 [patent_doc_number] => 20240363168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => PLANE AND BLOCK LOCATION DEPENDENT VOLTAGE BIASES IN NAND MEMORY [patent_app_type] => utility [patent_app_number] => 18/230336 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230336 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230336
PLANE AND BLOCK LOCATION DEPENDENT VOLTAGE BIASES IN NAND MEMORY Aug 3, 2023 Pending
Array ( [id] => 18848495 [patent_doc_number] => 20230410899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/364524 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364524 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364524
Memory system Aug 2, 2023 Issued
Array ( [id] => 19604421 [patent_doc_number] => 20240395301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => CURRENT SOURCE FOR READ OF PROGRAMMABLE RESISTANCE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/360119 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22733 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360119 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/360119
CURRENT SOURCE FOR READ OF PROGRAMMABLE RESISTANCE MEMORY CELLS Jul 26, 2023 Issued
Array ( [id] => 19687710 [patent_doc_number] => 20250006255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => MEMORY CIRCUIT AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 18/359169 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359169 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359169
Memory circuit and method of operating same Jul 25, 2023 Issued
Menu