Thong Quoc Le

Array ( [id] => 19574882 [patent_doc_number] => 20240379174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => NON-VOLATILE MEMORY WITH EARLY RAMP FOR IMPROVED PERFORMANCE [patent_app_type] => utility [patent_app_number] => 18/359822 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18591 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19384330 [patent_doc_number] => 20240274200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SINGLE-LEVEL CELL PUMP SKIP PROGRAM OPERATION PRELIMINARY PERIOD TIMING OPTIMIZATION FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/225375 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225375 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20162950 [patent_doc_number] => 12389607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Bipolar selector with independently tunable threshold voltages [patent_app_type] => utility [patent_app_number] => 18/356585 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 6266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19574846 [patent_doc_number] => 20240379138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => DUAL REFERENCE ZQ CALIBRATION CIRCUITS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/355366 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11759 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19467701 [patent_doc_number] => 20240321371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => ONE-TIME PROGRAMMABLE MEMORY DEVICES AND METHODS [patent_app_type] => utility [patent_app_number] => 18/355357 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18774024 [patent_doc_number] => 20230368854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => PHOTONIC SPIN REGISTER, INFORMATION WRITING METHOD, AND INFORMATION READ-OUT METHOD [patent_app_type] => utility [patent_app_number] => 18/223970 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18223970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19100769 [patent_doc_number] => 20240119997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SEMICONDUCTOR CHIP CAPABLE OF CALIBRATING BIAS VOLTAGE SUPPLIED TO WRITE CLOCK BUFFER REGARDLESS OF PROCESS VARIATION AND TEMPERATURE VARIATION, AND DEVICES INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/221598 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18221598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19712355 [patent_doc_number] => 20250022497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MAGNETO RESISTIVE MEMORY FOR MONOLITHIC DATA PROCESSING [patent_app_type] => utility [patent_app_number] => 18/350372 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8207 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18350372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20161140 [patent_doc_number] => 12387773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Magnetic random access memory cell and memory [patent_app_type] => utility [patent_app_number] => 18/219213 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219213 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18729083 [patent_doc_number] => 20230343378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => Storage Device and Preparation Method, Read-Write Method, Storage Chip and Electronic Device [patent_app_type] => utility [patent_app_number] => 18/216435 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19686117 [patent_doc_number] => 20250004662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => Read Gate Training and Tracking [patent_app_type] => utility [patent_app_number] => 18/342186 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342186 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20217614 [patent_doc_number] => 12414283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Devices and systems for flying bitline with jumper cell [patent_app_type] => utility [patent_app_number] => 18/341836 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341836 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19054422 [patent_doc_number] => 20240096391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => MEMORY DEVICES AND METHODS THEREOF FOR MANAGING ROW HAMMER EVENTS THEREIN [patent_app_type] => utility [patent_app_number] => 18/341128 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13431 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19926001 [patent_doc_number] => 12300293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Method for writing to magnetic random access memory [patent_app_type] => utility [patent_app_number] => 18/213176 [patent_app_country] => US [patent_app_date] => 2023-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 5964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213176 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19285382 [patent_doc_number] => 20240221859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => DIGITAL VERIFY FAILBIT COUNT (VFC) CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/339280 [patent_app_country] => US [patent_app_date] => 2023-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18339280 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19160860 [patent_doc_number] => 20240153567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => FLASH MEMORY FOR REDUCING RELIABILITY DEGRADATION OF OS DATA DUE TO SMT PROCESS [patent_app_type] => utility [patent_app_number] => 18/209069 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13988 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209069 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19634331 [patent_doc_number] => 20240412780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => METHODS AND SYSTEMS TO INCREASE EFFICIENCY OF SRAM WTITE ASSIST SCHEME [patent_app_type] => utility [patent_app_number] => 18/208306 [patent_app_country] => US [patent_app_date] => 2023-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5945 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20146595 [patent_doc_number] => 12380941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Power supply switching circuit and memory [patent_app_type] => utility [patent_app_number] => 18/327062 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18327062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20080563 [patent_doc_number] => 12354638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Signaling memory zone ranking information [patent_app_type] => utility [patent_app_number] => 18/204202 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18679517 [patent_doc_number] => 20230317173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/326587 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326587 [rel_patent_id] =>[rel_patent_doc_number] =>)