Search

Thor B. Nielsen

Examiner (ID: 7788, Phone: (571)270-3476 , Office: P/1616 )

Most Active Art Unit
1616
Art Unit(s)
1616
Total Applications
388
Issued Applications
208
Pending Applications
0
Abandoned Applications
182

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6688555 [patent_doc_number] => 20030032280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Method for filling fine hole' [patent_app_type] => new [patent_app_number] => 10/134757 [patent_app_country] => US [patent_app_date] => 2002-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4660 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032280.pdf [firstpage_image] =>[orig_patent_app_number] => 10134757 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/134757
Method for filling fine hole Apr 28, 2002 Issued
Array ( [id] => 1412353 [patent_doc_number] => 06524930 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Method for forming a bottom corner rounded STI' [patent_app_type] => B1 [patent_app_number] => 10/131958 [patent_app_country] => US [patent_app_date] => 2002-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 5137 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/524/06524930.pdf [firstpage_image] =>[orig_patent_app_number] => 10131958 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/131958
Method for forming a bottom corner rounded STI Apr 24, 2002 Issued
Array ( [id] => 6176888 [patent_doc_number] => 20020155726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Method of removing silicon nitride film' [patent_app_type] => new [patent_app_number] => 10/124398 [patent_app_country] => US [patent_app_date] => 2002-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4808 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20020155726.pdf [firstpage_image] =>[orig_patent_app_number] => 10124398 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/124398
Method of removing silicon nitride film formed on a surface of a material with a process gas containing a higher-order fluorocarbon in combination with a lower-order fluorocarbon Apr 17, 2002 Issued
Array ( [id] => 7631423 [patent_doc_number] => 06635509 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Wafer-level MEMS packaging' [patent_app_type] => B1 [patent_app_number] => 10/120528 [patent_app_country] => US [patent_app_date] => 2002-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 34 [patent_no_of_words] => 7061 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635509.pdf [firstpage_image] =>[orig_patent_app_number] => 10120528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/120528
Wafer-level MEMS packaging Apr 11, 2002 Issued
Array ( [id] => 1362014 [patent_doc_number] => 06569763 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Method to separate a metal film from an insulating film in a semiconductor device using adhesive tape' [patent_app_type] => B1 [patent_app_number] => 10/119638 [patent_app_country] => US [patent_app_date] => 2002-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1915 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/569/06569763.pdf [firstpage_image] =>[orig_patent_app_number] => 10119638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/119638
Method to separate a metal film from an insulating film in a semiconductor device using adhesive tape Apr 8, 2002 Issued
Array ( [id] => 1588615 [patent_doc_number] => 06482659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-19 [patent_title] => 'Post-epitaxial thermal oxidation for reducing microsteps on polished semiconductor wafers' [patent_app_type] => B2 [patent_app_number] => 10/114899 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 647 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/482/06482659.pdf [firstpage_image] =>[orig_patent_app_number] => 10114899 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/114899
Post-epitaxial thermal oxidation for reducing microsteps on polished semiconductor wafers Apr 1, 2002 Issued
Array ( [id] => 6735631 [patent_doc_number] => 20030013266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-16 [patent_title] => 'Manufacturing method of semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/101318 [patent_app_country] => US [patent_app_date] => 2002-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7085 [patent_no_of_claims] => 80 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20030013266.pdf [firstpage_image] =>[orig_patent_app_number] => 10101318 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/101318
Manufacturing method of semiconductor devices Mar 19, 2002 Issued
Array ( [id] => 6797148 [patent_doc_number] => 20030176022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Tool and method for welding to IC frames' [patent_app_type] => new [patent_app_number] => 10/097528 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2378 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20030176022.pdf [firstpage_image] =>[orig_patent_app_number] => 10097528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/097528
Tool and method for welding to IC frames Mar 12, 2002 Abandoned
Array ( [id] => 6306738 [patent_doc_number] => 20020094651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'Low dielectric constant STI with SOI devices' [patent_app_type] => new [patent_app_number] => 10/099169 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8730 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20020094651.pdf [firstpage_image] =>[orig_patent_app_number] => 10099169 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099169
Low dielectric constant STI with SOI devices Mar 12, 2002 Issued
Array ( [id] => 1414831 [patent_doc_number] => 06521533 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Method for producing a copper connection' [patent_app_type] => B1 [patent_app_number] => 10/070898 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2095 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521533.pdf [firstpage_image] =>[orig_patent_app_number] => 10070898 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/070898
Method for producing a copper connection Mar 12, 2002 Issued
Array ( [id] => 1264441 [patent_doc_number] => 06660602 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Stand-alone triggering structure for ESD protection of high voltage CMOS' [patent_app_type] => B1 [patent_app_number] => 10/097388 [patent_app_country] => US [patent_app_date] => 2002-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2239 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/660/06660602.pdf [firstpage_image] =>[orig_patent_app_number] => 10097388 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/097388
Stand-alone triggering structure for ESD protection of high voltage CMOS Mar 11, 2002 Issued
Array ( [id] => 1528176 [patent_doc_number] => 06479403 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Method to pattern polysilicon gates with high-k material gate dielectric' [patent_app_type] => B1 [patent_app_number] => 10/085718 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1143 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/479/06479403.pdf [firstpage_image] =>[orig_patent_app_number] => 10085718 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/085718
Method to pattern polysilicon gates with high-k material gate dielectric Feb 27, 2002 Issued
Array ( [id] => 1303152 [patent_doc_number] => 06620740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-16 [patent_title] => 'Methods to form electronic devices' [patent_app_type] => B2 [patent_app_number] => 10/087557 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4389 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/620/06620740.pdf [firstpage_image] =>[orig_patent_app_number] => 10087557 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087557
Methods to form electronic devices Feb 27, 2002 Issued
Array ( [id] => 1368161 [patent_doc_number] => 06566283 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Silane treatment of low dielectric constant materials in semiconductor device manufacturing' [patent_app_type] => B1 [patent_app_number] => 10/073068 [patent_app_country] => US [patent_app_date] => 2002-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3791 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566283.pdf [firstpage_image] =>[orig_patent_app_number] => 10073068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/073068
Silane treatment of low dielectric constant materials in semiconductor device manufacturing Feb 11, 2002 Issued
Array ( [id] => 6434499 [patent_doc_number] => 20020127783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/073528 [patent_app_country] => US [patent_app_date] => 2002-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7529 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20020127783.pdf [firstpage_image] =>[orig_patent_app_number] => 10073528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/073528
Method of fabricating a semiconductor device with phosphorous and boron ion implantation, and by annealing to control impurity concentration thereof Feb 10, 2002 Issued
Array ( [id] => 1239665 [patent_doc_number] => 06686262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Process for producing a photoelectric conversion device' [patent_app_type] => B2 [patent_app_number] => 10/056108 [patent_app_country] => US [patent_app_date] => 2002-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 8077 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686262.pdf [firstpage_image] =>[orig_patent_app_number] => 10056108 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/056108
Process for producing a photoelectric conversion device Jan 27, 2002 Issued
Array ( [id] => 1332355 [patent_doc_number] => 06596602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-22 [patent_title] => 'Method of fabricating a high dielectric constant metal oxide capacity insulator film using atomic layer CVD' [patent_app_type] => B2 [patent_app_number] => 10/053598 [patent_app_country] => US [patent_app_date] => 2002-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 6410 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/596/06596602.pdf [firstpage_image] =>[orig_patent_app_number] => 10053598 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/053598
Method of fabricating a high dielectric constant metal oxide capacity insulator film using atomic layer CVD Jan 23, 2002 Issued
Array ( [id] => 1362312 [patent_doc_number] => 06569781 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Method of forming an ultra-thin oxide layer on a silicon substrate by implantation of nitrogen through a sacrificial layer and subsequent annealing prior to oxide formation' [patent_app_type] => B1 [patent_app_number] => 10/054078 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2232 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/569/06569781.pdf [firstpage_image] =>[orig_patent_app_number] => 10054078 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/054078
Method of forming an ultra-thin oxide layer on a silicon substrate by implantation of nitrogen through a sacrificial layer and subsequent annealing prior to oxide formation Jan 21, 2002 Issued
Array ( [id] => 1534555 [patent_doc_number] => 06489208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-03 [patent_title] => 'Method of forming a laminated structure to enhance metal silicide adhesion on polycrystalline silicon' [patent_app_type] => B2 [patent_app_number] => 10/042148 [patent_app_country] => US [patent_app_date] => 2002-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5432 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489208.pdf [firstpage_image] =>[orig_patent_app_number] => 10042148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/042148
Method of forming a laminated structure to enhance metal silicide adhesion on polycrystalline silicon Jan 10, 2002 Issued
Array ( [id] => 1155998 [patent_doc_number] => 06764960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Manufacture of composite oxide film and magnetic tunneling junction element having thin composite oxide film' [patent_app_type] => B2 [patent_app_number] => 10/022598 [patent_app_country] => US [patent_app_date] => 2001-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/764/06764960.pdf [firstpage_image] =>[orig_patent_app_number] => 10022598 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/022598
Manufacture of composite oxide film and magnetic tunneling junction element having thin composite oxide film Dec 16, 2001 Issued
Menu