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Tien Quang Dinh

Supervisory Patent Examiner (ID: 8179, Phone: (571)272-6899 , Office: P/3647 )

Most Active Art Unit
3644
Art Unit(s)
3104, 3647, 3641, 3644, 3613
Total Applications
1457
Issued Applications
1028
Pending Applications
118
Abandoned Applications
313
Applications
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Applications

Application numberTitle of the applicationFiling DateStatus
08/016896 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH BREAKABLE FUSE ELEMENT COVERED WITH EXACTLY CONTROLLED INSULATING FILM Feb 11, 1993 Abandoned
08/002836 SEMICONDUCTOR DEVICE FOR ELEMENT ISOLATION AND MANUFACTURING METHOD THEREOF Jan 13, 1993 Abandoned
08/002464 THIN FILM FORMING METHOD AND APPARATUS FOR THE SAME Jan 6, 1993 Abandoned
07/996878 SEMICONDUCTOR DEVICE Dec 22, 1992 Abandoned
07/994969 OVERVOLTAGE SELF-PROTECTION SEMICONDUCTOR DEVICE, METHOD OF FABRICATION THEREOF AND SEMICONDUCTOR CIRCUIT USING THE SAME Dec 21, 1992 Abandoned
07/994158 METHOD FOR PRODUCING SOI SUBSTRATE AND SEMICONDUCTOR DEVICE USING THE SAME Dec 20, 1992 Abandoned
Array ( [id] => 3465788 [patent_doc_number] => 05391900 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-21 [patent_title] => 'Integrated circuit having power trunk line and method for layout of power trunk line' [patent_app_type] => 1 [patent_app_number] => 7/994056 [patent_app_country] => US [patent_app_date] => 1992-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4271 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/391/05391900.pdf [firstpage_image] =>[orig_patent_app_number] => 994056 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/994056 		Integrated circuit having power trunk line and method for layout of power trunk line Dec 17, 1992 Issued
07/992738 TUNNEL TRANSISTOR AND METHOD OF MANUFACTURING SAME Dec 17, 1992 Abandoned
07/991790 SELF-ALIGNED VERTICAL ANTIFUSE Dec 16, 1992 Abandoned
Array ( [id] => 3430082 [patent_doc_number] => 05416357 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-16 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 7/991248 [patent_app_country] => US [patent_app_date] => 1992-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1966 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/416/05416357.pdf [firstpage_image] =>[orig_patent_app_number] => 991248 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/991248 		Semiconductor integrated circuit device Dec 15, 1992 Issued
07/988714 SEMICONDUCTOR WAFER Dec 9, 1992 Abandoned
Array ( [id] => 3090509 [patent_doc_number] => 05285102 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-08 [patent_title] => 'Method of forming a planarized insulation layer' [patent_app_type] => 1 [patent_app_number] => 7/988386 [patent_app_country] => US [patent_app_date] => 1992-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2855 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/285/05285102.pdf [firstpage_image] =>[orig_patent_app_number] => 988386 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/988386 		Method of forming a planarized insulation layer Dec 7, 1992 Issued
Array ( [id] => 3087231 [patent_doc_number] => 05280188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-18 [patent_title] => 'Method of manufacturing a semiconductor integrated circuit device having at least one bipolar transistor and a plurality of MOS transistors' [patent_app_type] => 1 [patent_app_number] => 7/989455 [patent_app_country] => US [patent_app_date] => 1992-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 52 [patent_no_of_words] => 10077 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/280/05280188.pdf [firstpage_image] =>[orig_patent_app_number] => 989455 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/989455 		Method of manufacturing a semiconductor integrated circuit device having at least one bipolar transistor and a plurality of MOS transistors Dec 7, 1992 Issued
Array ( [id] => 3090475 [patent_doc_number] => 05285100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-08 [patent_title] => 'Semiconductor switching device' [patent_app_type] => 1 [patent_app_number] => 7/985543 [patent_app_country] => US [patent_app_date] => 1992-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6125 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/285/05285100.pdf [firstpage_image] =>[orig_patent_app_number] => 985543 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/985543 		Semiconductor switching device Dec 3, 1992 Issued
07/985792 SEMICONDUCTOR DEVICE INCLUDING NONVOLATILE Dec 2, 1992 Abandoned
Array ( [id] => 3101390 [patent_doc_number] => 05319245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-07 [patent_title] => 'Local interconnect for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/981908 [patent_app_country] => US [patent_app_date] => 1992-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1942 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/319/05319245.pdf [firstpage_image] =>[orig_patent_app_number] => 981908 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/981908 		Local interconnect for integrated circuits Nov 22, 1992 Issued
Array ( [id] => 2889024 [patent_doc_number] => 05268589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-07 [patent_title] => 'Semiconductor chip having at least one electrical resistor means' [patent_app_type] => 1 [patent_app_number] => 7/974318 [patent_app_country] => US [patent_app_date] => 1992-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1328 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/268/05268589.pdf [firstpage_image] =>[orig_patent_app_number] => 974318 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/974318 		Semiconductor chip having at least one electrical resistor means Nov 9, 1992 Issued
07/974322 STANDARD CELL LAYOUT ARRANGEMENT FOR AN LSI CIRCUIT Nov 9, 1992 Issued
Array ( [id] => 2991221 [patent_doc_number] => 05266821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-30 [patent_title] => 'Chip decoupling capacitor' [patent_app_type] => 1 [patent_app_number] => 7/970528 [patent_app_country] => US [patent_app_date] => 1992-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1503 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/266/05266821.pdf [firstpage_image] =>[orig_patent_app_number] => 970528 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/970528 		Chip decoupling capacitor Nov 1, 1992 Issued
07/963946 INVERTED EPITAXIAL PROCESS SEMICONDUCTOR DEVICES Oct 19, 1992 Abandoned
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