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Tien Quang Dinh

Supervisory Patent Examiner (ID: 8179, Phone: (571)272-6899 , Office: P/3647 )

Most Active Art Unit
3644
Art Unit(s)
3104, 3647, 3641, 3644, 3613
Total Applications
1457
Issued Applications
1028
Pending Applications
118
Abandoned Applications
313
Applications
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Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2676877 [patent_doc_number] => 05047820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Semi self-aligned high voltage P channel FET' [patent_app_type] => 1 [patent_app_number] => 7/523289 [patent_app_country] => US [patent_app_date] => 1990-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2719 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047820.pdf [firstpage_image] =>[orig_patent_app_number] => 523289 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/523289 		Semi self-aligned high voltage P channel FET May 10, 1990 Issued
07/516498 LOW TRIGGER VOLTAGE SCR PROTECTION DEVICE AND STRUCTURE May 3, 1990 Abandoned
07/518016 HIGH DENSITY LOCAL INTERCONNECT IN A SEMICONDUCTOR CIRCUIT USING METAL SILICIDE May 1, 1990 Abandoned
Array ( [id] => 2750427 [patent_doc_number] => 05028980 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Trench capacitor with expanded area' [patent_app_type] => 1 [patent_app_number] => 7/518276 [patent_app_country] => US [patent_app_date] => 1990-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 12 [patent_no_of_words] => 2607 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/028/05028980.pdf [firstpage_image] =>[orig_patent_app_number] => 518276 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/518276 		Trench capacitor with expanded area Apr 26, 1990 Issued
07/515442 BIPOLAR TRANSISTOR Apr 26, 1990 Abandoned
07/517467 AREA EFFICIENT CLOCK NOISE REDUCTION IN AN INTEGRATED CIRCUIT SUBSTRATE Apr 25, 1990 Abandoned
07/515695 SEMICONDUCTOR DEVICE Apr 25, 1990 Abandoned
Array ( [id] => 2722465 [patent_doc_number] => 05053849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Transistor with overlapping gate/drain and two-layered gate structures' [patent_app_type] => 1 [patent_app_number] => 7/515659 [patent_app_country] => US [patent_app_date] => 1990-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 37 [patent_no_of_words] => 9459 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053849.pdf [firstpage_image] =>[orig_patent_app_number] => 515659 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/515659 		Transistor with overlapping gate/drain and two-layered gate structures Apr 24, 1990 Issued
Array ( [id] => 2706185 [patent_doc_number] => 04989063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-29 [patent_title] => 'Hybrid wafer scale microcircuit integration' [patent_app_type] => 1 [patent_app_number] => 7/549672 [patent_app_country] => US [patent_app_date] => 1990-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 8471 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/989/04989063.pdf [firstpage_image] =>[orig_patent_app_number] => 549672 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/549672 		Hybrid wafer scale microcircuit integration Apr 23, 1990 Issued
07/513433 HIGH TEMPERATURE INTERCONNECT SYSTEM FOR AN INTEGRATED CIRCUIT Apr 22, 1990 Abandoned
Array ( [id] => 2984819 [patent_doc_number] => 05257095 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-26 [patent_title] => 'Common geometry high voltage tolerant long channel and high speed short channel field effect transistors' [patent_app_type] => 1 [patent_app_number] => 7/511853 [patent_app_country] => US [patent_app_date] => 1990-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 7781 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/257/05257095.pdf [firstpage_image] =>[orig_patent_app_number] => 511853 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/511853 		Common geometry high voltage tolerant long channel and high speed short channel field effect transistors Apr 18, 1990 Issued
07/512513 SUPERCONDUCTING DEVICE Apr 18, 1990 Abandoned
Array ( [id] => 2757110 [patent_doc_number] => 05029324 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Semiconductor device having a semiconductive protection layer' [patent_app_type] => 1 [patent_app_number] => 7/512013 [patent_app_country] => US [patent_app_date] => 1990-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2109 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/029/05029324.pdf [firstpage_image] =>[orig_patent_app_number] => 512013 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/512013 		Semiconductor device having a semiconductive protection layer Apr 15, 1990 Issued
Array ( [id] => 2834060 [patent_doc_number] => 05117272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Having a protective film of a polymer having a fluorine-containing aliphatic cyclic structure' [patent_app_type] => 1 [patent_app_number] => 7/509144 [patent_app_country] => US [patent_app_date] => 1990-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5736 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/117/05117272.pdf [firstpage_image] =>[orig_patent_app_number] => 509144 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/509144 		Having a protective film of a polymer having a fluorine-containing aliphatic cyclic structure Apr 15, 1990 Issued
Array ( [id] => 2942409 [patent_doc_number] => 05260604 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Semiconductor device with improved immunity to contact and conductor defects' [patent_app_type] => 1 [patent_app_number] => 7/508507 [patent_app_country] => US [patent_app_date] => 1990-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4972 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/260/05260604.pdf [firstpage_image] =>[orig_patent_app_number] => 508507 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/508507 		Semiconductor device with improved immunity to contact and conductor defects Apr 11, 1990 Issued
07/507520 FIELD EFFECT TRANSISTOR HAVING SCHOTTKY CONTACT AND A HIGH FREQUENCY CHARACTERISTIC Apr 10, 1990 Abandoned
07/506614 STRUCTURE OF INPUT PROTECTION TRANSISTOR IN SEMICONDUCTOR DEVICE INCLUDING MEMORY TRANSISTOR HAVING DOUBLE-LAYERED GATE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING SUCH INPUT PROTECTION TRANSISTOR Apr 9, 1990 Abandoned
07/508648 SEMICONDUCTOR DEVICE WITH A MULTIPLE PEAK IMPURITY CONCENTRATION AR- RANGEMENT TO PREVENT PUNCH-THROUGH WITHOUT ADVERSELY AFFECTING OTHER DEVICE CHARACTERISTICS Apr 9, 1990 Abandoned
Array ( [id] => 2689636 [patent_doc_number] => 05045918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Semiconductor device with reduced packaging stress' [patent_app_type] => 1 [patent_app_number] => 7/504710 [patent_app_country] => US [patent_app_date] => 1990-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 18 [patent_no_of_words] => 4650 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/045/05045918.pdf [firstpage_image] =>[orig_patent_app_number] => 504710 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/504710 		Semiconductor device with reduced packaging stress Apr 3, 1990 Issued
07/502526 SEMICONDUCTOR DEVICE WITH TUNGSTEN CONTACT Mar 29, 1990 Abandoned
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