Tien Quang Dinh

Array ( [id] => 3750630 [patent_doc_number] => 05717233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Semiconductor device having capacitior and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 8/778953 [patent_app_country] => US [patent_app_date] => 1997-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 5498 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717233.pdf [firstpage_image] =>[orig_patent_app_number] => 778953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4020011 [patent_doc_number] => 05880512 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Programmable interconnect structures and programmable integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/768601 [patent_app_country] => US [patent_app_date] => 1996-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8165 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880512.pdf [firstpage_image] =>[orig_patent_app_number] => 768601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4243026 [patent_doc_number] => 06144098 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Techniques for improving adhesion of silicon dioxide to titanium' [patent_app_type] => 1 [patent_app_number] => 8/744298 [patent_app_country] => US [patent_app_date] => 1996-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2262 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144098.pdf [firstpage_image] =>[orig_patent_app_number] => 744298 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3862103 [patent_doc_number] => 05705849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Antifuse structure and method for manufacturing it' [patent_app_type] => 1 [patent_app_number] => 8/735060 [patent_app_country] => US [patent_app_date] => 1996-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2025 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/705/05705849.pdf [firstpage_image] =>[orig_patent_app_number] => 735060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4137726 [patent_doc_number] => 06147395 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Method for fabricating a small area of contact between electrodes' [patent_app_type] => 1 [patent_app_number] => 8/724816 [patent_app_country] => US [patent_app_date] => 1996-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3558 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147395.pdf [firstpage_image] =>[orig_patent_app_number] => 724816 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3727786 [patent_doc_number] => 05682059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Semiconductor device including anti-fuse element and method of manufacturing the device' [patent_app_type] => 1 [patent_app_number] => 8/712156 [patent_app_country] => US [patent_app_date] => 1996-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 3406 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682059.pdf [firstpage_image] =>[orig_patent_app_number] => 712156 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3626191 [patent_doc_number] => 05689133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'ESD protection circuit' [patent_app_type] => 1 [patent_app_number] => 8/709611 [patent_app_country] => US [patent_app_date] => 1996-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 10590 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689133.pdf [firstpage_image] =>[orig_patent_app_number] => 709611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3702281 [patent_doc_number] => 05677564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Shallow trench isolation in integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/736651 [patent_app_country] => US [patent_app_date] => 1996-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 2180 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677564.pdf [firstpage_image] =>[orig_patent_app_number] => 736651 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4070072 [patent_doc_number] => 05866938 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Semiconductor device equipped with antifuse elements and a method for manufacturing an FPGA' [patent_app_type] => 1 [patent_app_number] => 8/698349 [patent_app_country] => US [patent_app_date] => 1996-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 8539 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/866/05866938.pdf [firstpage_image] =>[orig_patent_app_number] => 698349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3799701 [patent_doc_number] => 05780918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Semiconductor integrated circuit device having a programmable adjusting element in the form of a fuse mounted on a margin of the device and a method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/695975 [patent_app_country] => US [patent_app_date] => 1996-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7369 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 343 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/780/05780918.pdf [firstpage_image] =>[orig_patent_app_number] => 695975 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3980727 [patent_doc_number] => 05917229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Programmable/reprogrammable printed circuit board using fuse and/or antifuse as interconnect' [patent_app_type] => 1 [patent_app_number] => 8/688241 [patent_app_country] => US [patent_app_date] => 1996-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9902 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917229.pdf [firstpage_image] =>[orig_patent_app_number] => 688241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3736294 [patent_doc_number] => 05693979 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/677335 [patent_app_country] => US [patent_app_date] => 1996-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4450 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 419 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/693/05693979.pdf [firstpage_image] =>[orig_patent_app_number] => 677335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3799715 [patent_doc_number] => 05780919 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Electrically programmable interconnect structure having a PECVD amorphous silicon element' [patent_app_type] => 1 [patent_app_number] => 8/646823 [patent_app_country] => US [patent_app_date] => 1996-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5670 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/780/05780919.pdf [firstpage_image] =>[orig_patent_app_number] => 646823 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3729922 [patent_doc_number] => 05701027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Programmable interconnect structures and programmable integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/651102 [patent_app_country] => US [patent_app_date] => 1996-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8161 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701027.pdf [firstpage_image] =>[orig_patent_app_number] => 651102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3857531 [patent_doc_number] => 05767553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Flat cell mask ROM having compact select transistor structure' [patent_app_type] => 1 [patent_app_number] => 8/647645 [patent_app_country] => US [patent_app_date] => 1996-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 1844 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/767/05767553.pdf [firstpage_image] =>[orig_patent_app_number] => 647645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3732520 [patent_doc_number] => 05652459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Moisture guard ring for integrated circuit applications' [patent_app_type] => 1 [patent_app_number] => 8/643715 [patent_app_country] => US [patent_app_date] => 1996-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3923 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/652/05652459.pdf [firstpage_image] =>[orig_patent_app_number] => 643715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3857890 [patent_doc_number] => 05767578 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation' [patent_app_type] => 1 [patent_app_number] => 8/634957 [patent_app_country] => US [patent_app_date] => 1996-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5238 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/767/05767578.pdf [firstpage_image] =>[orig_patent_app_number] => 634957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3727744 [patent_doc_number] => 05682056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Phase shifting mask and method of manufacturing same' [patent_app_type] => 1 [patent_app_number] => 8/613766 [patent_app_country] => US [patent_app_date] => 1996-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 99 [patent_no_of_words] => 18555 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682056.pdf [firstpage_image] =>[orig_patent_app_number] => 613766 [rel_patent_id] =>[rel_patent_doc_number] =>)