Tien Quang Dinh

Array ( [id] => 3587787 [patent_doc_number] => 05516721 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Isolation structure using liquid phase oxide deposition' [patent_app_type] => 1 [patent_app_number] => 8/393599 [patent_app_country] => US [patent_app_date] => 1995-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 4640 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/516/05516721.pdf [firstpage_image] =>[orig_patent_app_number] => 393599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3548447 [patent_doc_number] => 05554861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Thin film transistors and active matrices including the same' [patent_app_type] => 1 [patent_app_number] => 8/388900 [patent_app_country] => US [patent_app_date] => 1995-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 26 [patent_no_of_words] => 5191 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/554/05554861.pdf [firstpage_image] =>[orig_patent_app_number] => 388900 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3565454 [patent_doc_number] => 05525821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'PN junction trench isolation type semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/383672 [patent_app_country] => US [patent_app_date] => 1995-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 7624 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/525/05525821.pdf [firstpage_image] =>[orig_patent_app_number] => 383672 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3548763 [patent_doc_number] => 05554884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Multilevel metallization process for use in fabricating microelectronic devices' [patent_app_type] => 1 [patent_app_number] => 8/378995 [patent_app_country] => US [patent_app_date] => 1995-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 2469 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/554/05554884.pdf [firstpage_image] =>[orig_patent_app_number] => 378995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3593240 [patent_doc_number] => 05497026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'Semiconductor device with improved breakdown voltage characteristics' [patent_app_type] => 1 [patent_app_number] => 8/372699 [patent_app_country] => US [patent_app_date] => 1995-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1613 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/497/05497026.pdf [firstpage_image] =>[orig_patent_app_number] => 372699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3570943 [patent_doc_number] => 05485030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-16 [patent_title] => 'Dielectric element isolated semiconductor device and a method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/371487 [patent_app_country] => US [patent_app_date] => 1995-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 17159 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/485/05485030.pdf [firstpage_image] =>[orig_patent_app_number] => 371487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3579806 [patent_doc_number] => 05523611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Integrated semiconductor array combination with standard elements' [patent_app_type] => 1 [patent_app_number] => 8/361701 [patent_app_country] => US [patent_app_date] => 1994-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1098 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/523/05523611.pdf [firstpage_image] =>[orig_patent_app_number] => 361701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3427946 [patent_doc_number] => 05422507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-06 [patent_title] => 'Electrical isolation in integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/361175 [patent_app_country] => US [patent_app_date] => 1994-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5190 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/422/05422507.pdf [firstpage_image] =>[orig_patent_app_number] => 361175 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3476010 [patent_doc_number] => 05477062 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-19 [patent_title] => 'Semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 8/339923 [patent_app_country] => US [patent_app_date] => 1994-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 2555 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/477/05477062.pdf [firstpage_image] =>[orig_patent_app_number] => 339923 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3750588 [patent_doc_number] => 05717230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Field programmable gate array having reproducible metal-to-metal amorphous silicon antifuses' [patent_app_type] => 1 [patent_app_number] => 8/323168 [patent_app_country] => US [patent_app_date] => 1994-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5947 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717230.pdf [firstpage_image] =>[orig_patent_app_number] => 323168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3565590 [patent_doc_number] => 05525830 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'Metal-to-metal antifuse including etch stop layer' [patent_app_type] => 1 [patent_app_number] => 8/322871 [patent_app_country] => US [patent_app_date] => 1994-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2194 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/525/05525830.pdf [firstpage_image] =>[orig_patent_app_number] => 322871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3797597 [patent_doc_number] => 05726482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Device-under-test card for a burn-in board' [patent_app_type] => 1 [patent_app_number] => 8/319906 [patent_app_country] => US [patent_app_date] => 1994-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4020 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/726/05726482.pdf [firstpage_image] =>[orig_patent_app_number] => 319906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3556609 [patent_doc_number] => 05493147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-20 [patent_title] => 'Antifuse circuit structure for use in a field programmable gate array and method of manufacture thereof' [patent_app_type] => 1 [patent_app_number] => 8/319765 [patent_app_country] => US [patent_app_date] => 1994-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2904 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/493/05493147.pdf [firstpage_image] =>[orig_patent_app_number] => 319765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3861815 [patent_doc_number] => 05705827 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Tunnel transistor and method of manufacturing same' [patent_app_type] => 1 [patent_app_number] => 8/303152 [patent_app_country] => US [patent_app_date] => 1994-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3339 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/705/05705827.pdf [firstpage_image] =>[orig_patent_app_number] => 303152 [rel_patent_id] =>[rel_patent_doc_number] =>)