Search

Tim Miles

Examiner (ID: 17471)

Most Active Art Unit
1305
Art Unit(s)
1101, 2899, 1801, 1724, 1305, 3402
Total Applications
1774
Issued Applications
1552
Pending Applications
28
Abandoned Applications
194

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 418224 [patent_doc_number] => 07281144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Power management in communication devices' [patent_app_type] => utility [patent_app_number] => 10/778535 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2734 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/281/07281144.pdf [firstpage_image] =>[orig_patent_app_number] => 10778535 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/778535
Power management in communication devices Feb 16, 2004 Issued
Array ( [id] => 7154438 [patent_doc_number] => 20040172570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Generator of word clock synchronized with timing reference bit sequence inherent in serial digital signal' [patent_app_type] => new [patent_app_number] => 10/778549 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8642 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20040172570.pdf [firstpage_image] =>[orig_patent_app_number] => 10778549 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/778549
Generator of word clock synchronized with timing reference bit sequence inherent in serial digital signal Feb 16, 2004 Abandoned
Array ( [id] => 481537 [patent_doc_number] => 07228448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Method for making power supplies smaller and more efficient for high-power PCs' [patent_app_type] => utility [patent_app_number] => 10/779279 [patent_app_country] => US [patent_app_date] => 2004-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4347 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/228/07228448.pdf [firstpage_image] =>[orig_patent_app_number] => 10779279 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/779279
Method for making power supplies smaller and more efficient for high-power PCs Feb 12, 2004 Issued
Array ( [id] => 7247010 [patent_doc_number] => 20040158752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Power management system and method for electronic circuits' [patent_app_type] => new [patent_app_number] => 10/770450 [patent_app_country] => US [patent_app_date] => 2004-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6380 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20040158752.pdf [firstpage_image] =>[orig_patent_app_number] => 10770450 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/770450
Power management system and method for electronic circuits Feb 3, 2004 Abandoned
Array ( [id] => 7423865 [patent_doc_number] => 20040183582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/768441 [patent_app_country] => US [patent_app_date] => 2004-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8158 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183582.pdf [firstpage_image] =>[orig_patent_app_number] => 10768441 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/768441
Semiconductor integrated circuit Feb 1, 2004 Issued
Array ( [id] => 400634 [patent_doc_number] => 07296170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-11-13 [patent_title] => 'Clock controller with clock source fail-safe logic' [patent_app_type] => utility [patent_app_number] => 10/764391 [patent_app_country] => US [patent_app_date] => 2004-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 7144 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/296/07296170.pdf [firstpage_image] =>[orig_patent_app_number] => 10764391 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/764391
Clock controller with clock source fail-safe logic Jan 22, 2004 Issued
Array ( [id] => 453465 [patent_doc_number] => 07251740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Apparatus coupling two circuits having different supply voltage sources' [patent_app_type] => utility [patent_app_number] => 10/764406 [patent_app_country] => US [patent_app_date] => 2004-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4001 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/251/07251740.pdf [firstpage_image] =>[orig_patent_app_number] => 10764406 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/764406
Apparatus coupling two circuits having different supply voltage sources Jan 22, 2004 Issued
Array ( [id] => 414846 [patent_doc_number] => 07284143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-16 [patent_title] => 'System and method for reducing clock skew' [patent_app_type] => utility [patent_app_number] => 10/750607 [patent_app_country] => US [patent_app_date] => 2003-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6910 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/284/07284143.pdf [firstpage_image] =>[orig_patent_app_number] => 10750607 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/750607
System and method for reducing clock skew Dec 28, 2003 Issued
Array ( [id] => 6999691 [patent_doc_number] => 20050138345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Autonomic binding of subsystems to system to prevent theft' [patent_app_type] => utility [patent_app_number] => 10/738183 [patent_app_country] => US [patent_app_date] => 2003-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2042 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20050138345.pdf [firstpage_image] =>[orig_patent_app_number] => 10738183 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/738183
Autonomic binding of subsystems to system to prevent theft Dec 16, 2003 Issued
Array ( [id] => 7341593 [patent_doc_number] => 20040133809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Method and system for automatically determining compatible and suitable hardware upgrades for computer hardware' [patent_app_type] => new [patent_app_number] => 10/737445 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3722 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20040133809.pdf [firstpage_image] =>[orig_patent_app_number] => 10737445 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/737445
Method and system for automatically determining compatible and suitable hardware upgrades for computer hardware Dec 15, 2003 Abandoned
Array ( [id] => 7185873 [patent_doc_number] => 20050125703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Method and system for power management including local bounding of device group power consumption' [patent_app_type] => utility [patent_app_number] => 10/727320 [patent_app_country] => US [patent_app_date] => 2003-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20050125703.pdf [firstpage_image] =>[orig_patent_app_number] => 10727320 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/727320
Method and system for power management including local bounding of device group power consumption Dec 2, 2003 Issued
Array ( [id] => 7185864 [patent_doc_number] => 20050125701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Method and system for energy management via energy-aware process scheduling' [patent_app_type] => utility [patent_app_number] => 10/727318 [patent_app_country] => US [patent_app_date] => 2003-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3498 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20050125701.pdf [firstpage_image] =>[orig_patent_app_number] => 10727318 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/727318
Method and system for energy management via energy-aware process scheduling Dec 2, 2003 Abandoned
Array ( [id] => 7107264 [patent_doc_number] => 20050108512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Method and system for allowing a system under test (SUT) to boot a plurality of operating systems without a need for local media' [patent_app_type] => utility [patent_app_number] => 10/715961 [patent_app_country] => US [patent_app_date] => 2003-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2649 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20050108512.pdf [firstpage_image] =>[orig_patent_app_number] => 10715961 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/715961
Method and system for allowing a system under test (SUT) to boot a plurality of operating systems without a need for local media Nov 16, 2003 Issued
Array ( [id] => 6941077 [patent_doc_number] => 20050114640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Method and system for efficiently binding a customer order with a processing system assembly in a manufacturing environment' [patent_app_type] => utility [patent_app_number] => 10/716161 [patent_app_country] => US [patent_app_date] => 2003-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20050114640.pdf [firstpage_image] =>[orig_patent_app_number] => 10716161 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/716161
Method and system for efficiently binding a customer order with a processing system assembly in a manufacturing environment Nov 16, 2003 Abandoned
Array ( [id] => 423713 [patent_doc_number] => 07275169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-25 [patent_title] => 'Graphical view of shutdown process' [patent_app_type] => utility [patent_app_number] => 10/701379 [patent_app_country] => US [patent_app_date] => 2003-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3533 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/275/07275169.pdf [firstpage_image] =>[orig_patent_app_number] => 10701379 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701379
Graphical view of shutdown process Nov 2, 2003 Issued
Array ( [id] => 7167173 [patent_doc_number] => 20050086549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Power management over switching fabrics' [patent_app_type] => utility [patent_app_number] => 10/687512 [patent_app_country] => US [patent_app_date] => 2003-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3545 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20050086549.pdf [firstpage_image] =>[orig_patent_app_number] => 10687512 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/687512
Power management over switching fabrics Oct 14, 2003 Issued
Array ( [id] => 633432 [patent_doc_number] => 07134034 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-07 [patent_title] => 'Data paths with receiver timing fixable to a downstream stage and methods of operation thereof' [patent_app_type] => utility [patent_app_number] => 10/686420 [patent_app_country] => US [patent_app_date] => 2003-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3903 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/134/07134034.pdf [firstpage_image] =>[orig_patent_app_number] => 10686420 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/686420
Data paths with receiver timing fixable to a downstream stage and methods of operation thereof Oct 14, 2003 Issued
Array ( [id] => 7118959 [patent_doc_number] => 20050071706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Slew rate control mechanism' [patent_app_type] => utility [patent_app_number] => 10/675875 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1547 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20050071706.pdf [firstpage_image] =>[orig_patent_app_number] => 10675875 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/675875
Slew rate control mechanism Sep 28, 2003 Issued
Array ( [id] => 7437182 [patent_doc_number] => 20040230851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Portable electronic device and power control method thereof' [patent_app_type] => new [patent_app_number] => 10/650983 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2910 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20040230851.pdf [firstpage_image] =>[orig_patent_app_number] => 10650983 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/650983
Portable electronic device and power control method thereof Aug 28, 2003 Issued
Array ( [id] => 6973827 [patent_doc_number] => 20050038987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'System and method having strapping with override functions' [patent_app_type] => utility [patent_app_number] => 10/641103 [patent_app_country] => US [patent_app_date] => 2003-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3207 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20050038987.pdf [firstpage_image] =>[orig_patent_app_number] => 10641103 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/641103
System and method having strapping with override functions Aug 14, 2003 Issued
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