Tim T. Vo

Array ( [id] => 1129535 [patent_doc_number] => 06795881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Physical layer and data link interface with ethernet pre-negotiation' [patent_app_type] => B1 [patent_app_number] => 09/471200 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 4886 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795881.pdf [firstpage_image] =>[orig_patent_app_number] => 09471200 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1308506 [patent_doc_number] => 06629174 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Synchronization using bus arbitration control for system analysis' [patent_app_type] => B1 [patent_app_number] => 09/460876 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 9893 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629174.pdf [firstpage_image] =>[orig_patent_app_number] => 09460876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1602206 [patent_doc_number] => 06493784 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Communication device, multiple bus control device and LSI for controlling multiple bus' [patent_app_type] => B1 [patent_app_number] => 09/454858 [patent_app_country] => US [patent_app_date] => 1999-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 11870 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493784.pdf [firstpage_image] =>[orig_patent_app_number] => 09454858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4381799 [patent_doc_number] => 06256742 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Information processing apparatus having a power saving function' [patent_app_type] => 1 [patent_app_number] => 9/455364 [patent_app_country] => US [patent_app_date] => 1999-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9499 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256742.pdf [firstpage_image] =>[orig_patent_app_number] => 455364 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1595816 [patent_doc_number] => 06484222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'System for incorporating multiple expansion slots in a variable speed peripheral bus' [patent_app_type] => B1 [patent_app_number] => 09/455048 [patent_app_country] => US [patent_app_date] => 1999-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5245 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/484/06484222.pdf [firstpage_image] =>[orig_patent_app_number] => 09455048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6661122 [patent_doc_number] => 20030135766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Method and apparatus to control computer system power' [patent_app_type] => new [patent_app_number] => 09/453656 [patent_app_country] => US [patent_app_date] => 1999-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3233 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20030135766.pdf [firstpage_image] =>[orig_patent_app_number] => 09453656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1395091 [patent_doc_number] => 06567876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Docking PCI to PCI bridge using IEEE 1394 link' [patent_app_type] => B1 [patent_app_number] => 09/454957 [patent_app_country] => US [patent_app_date] => 1999-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11701 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/567/06567876.pdf [firstpage_image] =>[orig_patent_app_number] => 09454957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1444041 [patent_doc_number] => 06496890 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Bus hang prevention and recovery for data communication systems employing a shared bus interface with multiple bus masters' [patent_app_type] => B1 [patent_app_number] => 09/454681 [patent_app_country] => US [patent_app_date] => 1999-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496890.pdf [firstpage_image] =>[orig_patent_app_number] => 09454681 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7633155 [patent_doc_number] => 06658465 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Method and apparatus for monitoring and controlling programs in a network' [patent_app_type] => B1 [patent_app_number] => 09/447529 [patent_app_country] => US [patent_app_date] => 1999-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13155 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/658/06658465.pdf [firstpage_image] =>[orig_patent_app_number] => 09447529 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1587308 [patent_doc_number] => 06425031 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Method for exchanging signals between modules connected via a bus, and a device for carrying out said method' [patent_app_type] => B1 [patent_app_number] => 09/367725 [patent_app_country] => US [patent_app_date] => 1999-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7137 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/425/06425031.pdf [firstpage_image] =>[orig_patent_app_number] => 09367725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1429041 [patent_doc_number] => 06529975 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Method and apparatus for addressing and controlling exspansion devices through an AC-link and a codec' [patent_app_type] => B1 [patent_app_number] => 09/432434 [patent_app_country] => US [patent_app_date] => 1999-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9645 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/529/06529975.pdf [firstpage_image] =>[orig_patent_app_number] => 09432434 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1308524 [patent_doc_number] => 06629176 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Arbiter architecture allowing rapid implementation of arbitration policies' [patent_app_type] => B1 [patent_app_number] => 09/432817 [patent_app_country] => US [patent_app_date] => 1999-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2123 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629176.pdf [firstpage_image] =>[orig_patent_app_number] => 09432817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1429689 [patent_doc_number] => 06510481 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Method for out-of-band network communication' [patent_app_type] => B1 [patent_app_number] => 09/431606 [patent_app_country] => US [patent_app_date] => 1999-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5381 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510481.pdf [firstpage_image] =>[orig_patent_app_number] => 09431606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1505933 [patent_doc_number] => 06487622 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Quorum arbitrator for a high availability system' [patent_app_type] => B1 [patent_app_number] => 09/429355 [patent_app_country] => US [patent_app_date] => 1999-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5675 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487622.pdf [firstpage_image] =>[orig_patent_app_number] => 09429355 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1214296 [patent_doc_number] => 06715013 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Bus system having improved control process' [patent_app_type] => B1 [patent_app_number] => 09/427978 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3629 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/715/06715013.pdf [firstpage_image] =>[orig_patent_app_number] => 09427978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1429652 [patent_doc_number] => 06510475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Data fetching control mechanism and method for fetching optimized data for bus devices behind host bridge' [patent_app_type] => B1 [patent_app_number] => 09/422933 [patent_app_country] => US [patent_app_date] => 1999-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5997 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510475.pdf [firstpage_image] =>[orig_patent_app_number] => 09422933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1308568 [patent_doc_number] => 06629183 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Interface device for transmitting information between input/output means' [patent_app_type] => B1 [patent_app_number] => 09/422784 [patent_app_country] => US [patent_app_date] => 1999-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3591 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629183.pdf [firstpage_image] =>[orig_patent_app_number] => 09422784 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1365125 [patent_doc_number] => 06581129 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Intelligent PCI/PCI-X host bridge' [patent_app_type] => B1 [patent_app_number] => 09/414339 [patent_app_country] => US [patent_app_date] => 1999-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4689 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/581/06581129.pdf [firstpage_image] =>[orig_patent_app_number] => 09414339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7645926 [patent_doc_number] => 06477597 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Lock architecture for large scale system' [patent_app_type] => B1 [patent_app_number] => 09/411231 [patent_app_country] => US [patent_app_date] => 1999-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4282 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477597.pdf [firstpage_image] =>[orig_patent_app_number] => 09411231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1229042 [patent_doc_number] => 06701405 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'DMA handshake protocol' [patent_app_type] => B1 [patent_app_number] => 09/410927 [patent_app_country] => US [patent_app_date] => 1999-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6581 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/701/06701405.pdf [firstpage_image] =>[orig_patent_app_number] => 09410927 [rel_patent_id] =>[rel_patent_doc_number] =>)