Tima Michele Mcguthry Banks

Array ( [id] => 3779491 [patent_doc_number] => 05845147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Single lock command for an I/O storage system that performs both locking and I/O data operation' [patent_app_type] => 1 [patent_app_number] => 8/617690 [patent_app_country] => US [patent_app_date] => 1996-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5337 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/845/05845147.pdf [firstpage_image] =>[orig_patent_app_number] => 617690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3905507 [patent_doc_number] => 05778253 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'No repeat byte compression method for achieving high speed data transfer from a parallel port' [patent_app_type] => 1 [patent_app_number] => 8/615097 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12136 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778253.pdf [firstpage_image] =>[orig_patent_app_number] => 615097 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3806505 [patent_doc_number] => 05841973 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Messaging in distributed memory multiprocessing system having shell circuitry for atomic control of message storage queue\'s tail pointer structure in local memory' [patent_app_type] => 1 [patent_app_number] => 8/615694 [patent_app_country] => US [patent_app_date] => 1996-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 9319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841973.pdf [firstpage_image] =>[orig_patent_app_number] => 615694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4207932 [patent_doc_number] => 06044225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Multiple parallel digital data stream channel controller' [patent_app_type] => 1 [patent_app_number] => 8/596921 [patent_app_country] => US [patent_app_date] => 1996-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 23388 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044225.pdf [firstpage_image] =>[orig_patent_app_number] => 596921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3831110 [patent_doc_number] => 05812880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Multi-CPU system\'s data I/O processor with communication arbitrator performing access operations on I/O connected to a first CPU bus on behalf of a second CPU' [patent_app_type] => 1 [patent_app_number] => 8/613252 [patent_app_country] => US [patent_app_date] => 1996-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 8330 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812880.pdf [firstpage_image] =>[orig_patent_app_number] => 613252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3775710 [patent_doc_number] => 05742774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Multi-ring SONET architecture having shared gateways daisy chained to complete the main and subsidiary ring controlled by a common master controller' [patent_app_type] => 1 [patent_app_number] => 8/605937 [patent_app_country] => US [patent_app_date] => 1996-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3666 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742774.pdf [firstpage_image] =>[orig_patent_app_number] => 605937 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4273297 [patent_doc_number] => 06209048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Peripheral with integrated HTTP server for remote access using URL\'s' [patent_app_type] => 1 [patent_app_number] => 8/599373 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5646 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/209/06209048.pdf [firstpage_image] =>[orig_patent_app_number] => 599373 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3776602 [patent_doc_number] => 05742832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Computer system with programmable driver output\'s strengths responsive to control signal matching preassigned address range' [patent_app_type] => 1 [patent_app_number] => 8/599615 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4092 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742832.pdf [firstpage_image] =>[orig_patent_app_number] => 599615 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3888178 [patent_doc_number] => 05838972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Method and apparatus for dynamically loading an input run-time module and an output run-time module' [patent_app_type] => 1 [patent_app_number] => 8/599319 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4381 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838972.pdf [firstpage_image] =>[orig_patent_app_number] => 599319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4147082 [patent_doc_number] => 06128676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'DMA control device and recording apparatus having priority control circuit dynamically changes defined priorities within predetermined time interval' [patent_app_type] => 1 [patent_app_number] => 8/597254 [patent_app_country] => US [patent_app_date] => 1996-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5088 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128676.pdf [firstpage_image] =>[orig_patent_app_number] => 597254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3904541 [patent_doc_number] => 05778186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Data serving apparatus with access requests quantized into variable size data and time quantization units' [patent_app_type] => 1 [patent_app_number] => 8/594446 [patent_app_country] => US [patent_app_date] => 1996-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 48 [patent_no_of_words] => 13298 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778186.pdf [firstpage_image] =>[orig_patent_app_number] => 594446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3969758 [patent_doc_number] => 05958021 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Input-output interface circuit with multiplexers selecting an external signal or an internal output signal as the input signal from an I/O terminal' [patent_app_type] => 1 [patent_app_number] => 8/593288 [patent_app_country] => US [patent_app_date] => 1996-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5154 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/958/05958021.pdf [firstpage_image] =>[orig_patent_app_number] => 593288 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3849135 [patent_doc_number] => 05740466 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Flexible processor-driven SCSI controller with buffer memory and local processor memory coupled via separate buses' [patent_app_type] => 1 [patent_app_number] => 8/590387 [patent_app_country] => US [patent_app_date] => 1996-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 9197 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740466.pdf [firstpage_image] =>[orig_patent_app_number] => 590387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3661431 [patent_doc_number] => 05640601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Apparatus and method for indexing frames as the images are being compressed using signal from data digitizer to notify host unit at every frame' [patent_app_type] => 1 [patent_app_number] => 8/589301 [patent_app_country] => US [patent_app_date] => 1996-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2751 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640601.pdf [firstpage_image] =>[orig_patent_app_number] => 589301 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3878245 [patent_doc_number] => 05793983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Input/output channel interface which automatically deallocates failed subchannel and re-segments data block for transmitting over a reassigned subchannel' [patent_app_type] => 1 [patent_app_number] => 8/589276 [patent_app_country] => US [patent_app_date] => 1996-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8976 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793983.pdf [firstpage_image] =>[orig_patent_app_number] => 589276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4056679 [patent_doc_number] => 05909545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Method and system for on demand downloading of module to enable remote control of an application program over a network' [patent_app_type] => 1 [patent_app_number] => 8/589136 [patent_app_country] => US [patent_app_date] => 1996-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 8218 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909545.pdf [firstpage_image] =>[orig_patent_app_number] => 589136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3803593 [patent_doc_number] => 05822615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Control method for automatic gathering of status data for distributed type remote I/O control system at start-up' [patent_app_type] => 1 [patent_app_number] => 8/583431 [patent_app_country] => US [patent_app_date] => 1996-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 50 [patent_no_of_words] => 27705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822615.pdf [firstpage_image] =>[orig_patent_app_number] => 583431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3806703 [patent_doc_number] => 05841983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Communication system for transmitting divisional messages back-to-back by pre-setting blank duration between the divisonal messages prior to transmission' [patent_app_type] => 1 [patent_app_number] => 8/582429 [patent_app_country] => US [patent_app_date] => 1996-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 54 [patent_no_of_words] => 16037 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841983.pdf [firstpage_image] =>[orig_patent_app_number] => 582429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3778378 [patent_doc_number] => 05845076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Data input/output apparatus couped to a network for accepting direct commands from a data source after receiving request through the server' [patent_app_type] => 1 [patent_app_number] => 8/582180 [patent_app_country] => US [patent_app_date] => 1996-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6762 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/845/05845076.pdf [firstpage_image] =>[orig_patent_app_number] => 582180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4008071 [patent_doc_number] => 05892923 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Parallel computer system using properties of messages to route them through an interconnect network and to select virtual channel circuits therewithin' [patent_app_type] => 1 [patent_app_number] => 8/580257 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 15217 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892923.pdf [firstpage_image] =>[orig_patent_app_number] => 580257 [rel_patent_id] =>[rel_patent_doc_number] =>)