| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 05669002
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[patent_kind] => NA
[patent_issue_date] => 1997-09-16
[patent_title] => 'Multi-processor resource locking mechanism with a lock register corresponding to each resource stored in common memory'
[patent_app_type] => 1
[patent_app_number] => 8/569555
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[patent_app_date] => 1995-12-08
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[pdf_file] => patents/05/669/05669002.pdf
[firstpage_image] =>[orig_patent_app_number] => 569555
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/569555 | Multi-processor resource locking mechanism with a lock register corresponding to each resource stored in common memory | Dec 7, 1995 | Issued |
Array
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[patent_doc_number] => 05758081
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'Computing and communications transmitting, receiving system, with a push button interface, that is continously on, that pairs up with a personal computer and carries out mainly communications related routine tasks'
[patent_app_type] => 1
[patent_app_number] => 8/569846
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[pdf_file] => patents/05/758/05758081.pdf
[firstpage_image] =>[orig_patent_app_number] => 569846
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/569846 | Computing and communications transmitting, receiving system, with a push button interface, that is continously on, that pairs up with a personal computer and carries out mainly communications related routine tasks | Dec 7, 1995 | Issued |
Array
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[id] => 3842600
[patent_doc_number] => 05784646
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Hierarchical data storage processing apparatus for partitioning resource across the storage hierarchy'
[patent_app_type] => 1
[patent_app_number] => 8/557124
[patent_app_country] => US
[patent_app_date] => 1995-12-07
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/784/05784646.pdf
[firstpage_image] =>[orig_patent_app_number] => 557124
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/557124 | Hierarchical data storage processing apparatus for partitioning resource across the storage hierarchy | Dec 6, 1995 | Issued |
Array
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[id] => 3974900
[patent_doc_number] => 05937205
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-10
[patent_title] => 'Dynamic queue prioritization by modifying priority value based on queue\'s level and serving less than a maximum number of requests per queue'
[patent_app_type] => 1
[patent_app_number] => 8/568327
[patent_app_country] => US
[patent_app_date] => 1995-12-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/937/05937205.pdf
[firstpage_image] =>[orig_patent_app_number] => 568327
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/568327 | Dynamic queue prioritization by modifying priority value based on queue's level and serving less than a maximum number of requests per queue | Dec 5, 1995 | Issued |
Array
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[id] => 3842632
[patent_doc_number] => 05784648
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Token style arbitration on a serial bus by passing an unrequested bus grand signal and returning the token by a token refusal signal'
[patent_app_type] => 1
[patent_app_number] => 8/565986
[patent_app_country] => US
[patent_app_date] => 1995-12-01
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[pdf_file] => patents/05/784/05784648.pdf
[firstpage_image] =>[orig_patent_app_number] => 565986
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/565986 | Token style arbitration on a serial bus by passing an unrequested bus grand signal and returning the token by a token refusal signal | Nov 30, 1995 | Issued |
Array
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[id] => 3873222
[patent_doc_number] => 05768615
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Method and apparatus for functional expansion through predefined signal interfaces'
[patent_app_type] => 1
[patent_app_number] => 8/565717
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[pdf_file] => patents/05/768/05768615.pdf
[firstpage_image] =>[orig_patent_app_number] => 565717
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/565717 | Method and apparatus for functional expansion through predefined signal interfaces | Nov 29, 1995 | Issued |
Array
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[id] => 3855392
[patent_doc_number] => 05708853
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-13
[patent_title] => 'IC card having camera, microphone, and modem for use in information processors'
[patent_app_type] => 1
[patent_app_number] => 8/561238
[patent_app_country] => US
[patent_app_date] => 1995-11-21
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[pdf_file] => patents/05/708/05708853.pdf
[firstpage_image] =>[orig_patent_app_number] => 561238
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/561238 | IC card having camera, microphone, and modem for use in information processors | Nov 20, 1995 | Issued |
Array
(
[id] => 4225551
[patent_doc_number] => 06029214
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-22
[patent_title] => 'Input tablet system with user programmable absolute coordinate mode and relative coordinate mode segments'
[patent_app_type] => 1
[patent_app_number] => 8/566883
[patent_app_country] => US
[patent_app_date] => 1995-11-03
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[pdf_file] => patents/06/029/06029214.pdf
[firstpage_image] =>[orig_patent_app_number] => 566883
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/566883 | Input tablet system with user programmable absolute coordinate mode and relative coordinate mode segments | Nov 2, 1995 | Issued |
Array
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[id] => 3739068
[patent_doc_number] => 05652900
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-29
[patent_title] => 'Data processor having 2n bits width data bus for context switching function'
[patent_app_type] => 1
[patent_app_number] => 8/548766
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[pdf_file] => patents/05/652/05652900.pdf
[firstpage_image] =>[orig_patent_app_number] => 548766
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/548766 | Data processor having 2n bits width data bus for context switching function | Oct 25, 1995 | Issued |
Array
(
[id] => 3626121
[patent_doc_number] => 05566348
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-15
[patent_title] => 'System for adaptively optimizing automated optical library management'
[patent_app_type] => 1
[patent_app_number] => 7/965113
[patent_app_country] => US
[patent_app_date] => 1995-10-22
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[pdf_file] => patents/05/566/05566348.pdf
[firstpage_image] =>[orig_patent_app_number] => 965113
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/965113 | System for adaptively optimizing automated optical library management | Oct 21, 1995 | Issued |
Array
(
[id] => 3694115
[patent_doc_number] => 05634006
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-27
[patent_title] => 'System and method for ensuring QOS in a token ring network utilizing an access regulator at each node for allocating frame size for plural transmitting applications based upon negotiated information and priority in the network'
[patent_app_type] => 1
[patent_app_number] => 8/540923
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[pdf_file] => patents/05/634/05634006.pdf
[firstpage_image] =>[orig_patent_app_number] => 540923
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/540923 | System and method for ensuring QOS in a token ring network utilizing an access regulator at each node for allocating frame size for plural transmitting applications based upon negotiated information and priority in the network | Oct 10, 1995 | Issued |
Array
(
[id] => 3873335
[patent_doc_number] => 05768623
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'System and method for sharing multiple storage arrays by dedicating adapters as primary controller and secondary controller for arrays reside in different host computers'
[patent_app_type] => 1
[patent_app_number] => 8/531239
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[pdf_file] => patents/05/768/05768623.pdf
[firstpage_image] =>[orig_patent_app_number] => 531239
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/531239 | System and method for sharing multiple storage arrays by dedicating adapters as primary controller and secondary controller for arrays reside in different host computers | Sep 18, 1995 | Issued |
Array
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[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Method and system for managing objects in networked computer system with action performed in the server and object updated in the client'
[patent_app_type] => 1
[patent_app_number] => 8/531157
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[pdf_file] => patents/05/768/05768511.pdf
[firstpage_image] =>[orig_patent_app_number] => 531157
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/531157 | Method and system for managing objects in networked computer system with action performed in the server and object updated in the client | Sep 17, 1995 | Issued |
Array
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[id] => 3506766
[patent_doc_number] => 05537639
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'Method of communicating between CPUs within a copying machine with transmitting and receiving buffers divided into control flag area and data area'
[patent_app_type] => 1
[patent_app_number] => 8/523905
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Array
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[patent_kind] => NA
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[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/521436 | Data-independent type computer system: processing machine, data machine and man-machine interface therein | Aug 29, 1995 | Issued |
Array
(
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[patent_doc_number] => 05754766
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-19
[patent_title] => 'Integrated circuit system for direct document execution'
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[patent_app_number] => 8/514890
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[patent_app_date] => 1995-08-14
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[firstpage_image] =>[orig_patent_app_number] => 514890
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/514890 | Integrated circuit system for direct document execution | Aug 13, 1995 | Issued |
| 08/513095 | PARASITIC PERSONAL COMPUTER INTERFACE | Aug 8, 1995 | Abandoned |
Array
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[patent_issue_date] => 1997-11-04
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[patent_app_number] => 8/501119
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Array
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[patent_kind] => B1
[patent_issue_date] => 2002-04-30
[patent_title] => 'Processor for performing subword permutations and combinations'
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| 08/509077 | SYSTEM AND METHOD FOR ENCODING KEYBOARD COMMAND SEQUENCES | Jul 30, 1995 | Abandoned |