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Timothy Aberle

Examiner (ID: 10651)

Most Active Art Unit
3501
Art Unit(s)
3501
Total Applications
113
Issued Applications
106
Pending Applications
0
Abandoned Applications
7

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18773996 [patent_doc_number] => 20230368826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => MEMORY CIRCUIT AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/358177 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358177 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358177
MEMORY CIRCUIT AND METHOD OF OPERATING THE SAME Jul 24, 2023 Pending
Array ( [id] => 18864035 [patent_doc_number] => 20230418471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => APPARATUSES AND METHODS FOR CONFIGURABLE MEMORY ARRAY BANK ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 18/326303 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326303 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/326303
APPARATUSES AND METHODS FOR CONFIGURABLE MEMORY ARRAY BANK ARCHITECTURES May 30, 2023 Pending
Array ( [id] => 18615550 [patent_doc_number] => 20230282287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => ONE TIME PROGRAMMABLE MEMORY [patent_app_type] => utility [patent_app_number] => 18/317665 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317665 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/317665
ONE TIME PROGRAMMABLE MEMORY May 14, 2023 Pending
Array ( [id] => 18820762 [patent_doc_number] => 20230395103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => MEMORY BANDWIDTH AGGREGATION USING SIMULTANEOUS ACCESS OF STACKED SEMICONDUCTOR MEMORY DIE [patent_app_type] => utility [patent_app_number] => 18/195860 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195860 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195860
MEMORY BANDWIDTH AGGREGATION USING SIMULTANEOUS ACCESS OF STACKED SEMICONDUCTOR MEMORY DIE May 9, 2023 Pending
Array ( [id] => 18655235 [patent_doc_number] => 20230301086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/138820 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/138820
SEMICONDUCTOR MEMORY DEVICE Apr 24, 2023 Pending
Array ( [id] => 18555047 [patent_doc_number] => 20230253063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => REPAIRABLE LATCH ARRAY [patent_app_type] => utility [patent_app_number] => 18/302510 [patent_app_country] => US [patent_app_date] => 2023-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18302510 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/302510
REPAIRABLE LATCH ARRAY Apr 17, 2023 Pending
Array ( [id] => 19093730 [patent_doc_number] => 11955194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Tracking and refreshing state metrics in memory sub-systems [patent_app_type] => utility [patent_app_number] => 18/133103 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133103 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133103
Tracking and refreshing state metrics in memory sub-systems Apr 10, 2023 Issued
Array ( [id] => 18555017 [patent_doc_number] => 20230253033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => Memory Device Having Variable Impedance Memory Cells and Time-to-Transition Sensing of Data Stored Therein [patent_app_type] => utility [patent_app_number] => 18/297605 [patent_app_country] => US [patent_app_date] => 2023-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297605 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297605
Memory Device Having Variable Impedance Memory Cells and Time-to-Transition Sensing of Data Stored Therein Apr 7, 2023 Pending
Array ( [id] => 19427933 [patent_doc_number] => 12087361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/177320 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 9489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177320 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/177320
MEMORY DEVICE AND OPERATING METHOD THEREOF Mar 1, 2023 Pending
Array ( [id] => 18721251 [patent_doc_number] => 11798603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Circuit for generating and trimming phases for memory cell read operations [patent_app_type] => utility [patent_app_number] => 18/175375 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18175375 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/175375
Circuit for generating and trimming phases for memory cell read operations Feb 26, 2023 Issued
Array ( [id] => 18455880 [patent_doc_number] => 20230197161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => MEMORY DEVICE WITH IMPROVED PROGRAM PERFORMANCE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/173730 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/173730
Memory device with improved program performance and method of operating the same Feb 22, 2023 Issued
Array ( [id] => 18439699 [patent_doc_number] => 20230186994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/167133 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167133 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/167133
Semiconductor memory device Feb 9, 2023 Issued
Array ( [id] => 19122824 [patent_doc_number] => 11966814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Surface code computations using Auto-CCZ quantum states [patent_app_type] => utility [patent_app_number] => 18/101522 [patent_app_country] => US [patent_app_date] => 2023-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13352 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18101522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/101522
Surface code computations using Auto-CCZ quantum states Jan 24, 2023 Issued
Array ( [id] => 18323577 [patent_doc_number] => 20230121705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => MEMORY DEVICE PROGRAMMING TECHINIQUE USING FEWER LATCHES [patent_app_type] => utility [patent_app_number] => 18/085228 [patent_app_country] => US [patent_app_date] => 2022-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18085228 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/085228
Memory device programming technique using fewer latches Dec 19, 2022 Issued
Array ( [id] => 18309154 [patent_doc_number] => 20230113054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/080524 [patent_app_country] => US [patent_app_date] => 2022-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 422 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18080524 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/080524
Semiconductor memory device Dec 12, 2022 Issued
Array ( [id] => 18192764 [patent_doc_number] => 20230046283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => MEMORY CELL SENSING [patent_app_type] => utility [patent_app_number] => 17/980871 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17980871 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/980871
Memory cell sensing Nov 3, 2022 Issued
Array ( [id] => 18967212 [patent_doc_number] => 11900990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Memory device having variable impedance memory cells and time-to-transition sensing of data stored therein [patent_app_type] => utility [patent_app_number] => 18/046142 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 25197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046142 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046142
Memory device having variable impedance memory cells and time-to-transition sensing of data stored therein Oct 11, 2022 Issued
Array ( [id] => 18562746 [patent_doc_number] => 11727996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Dynamic valley searching in solid state drives [patent_app_type] => utility [patent_app_number] => 17/961468 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961468 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961468
Dynamic valley searching in solid state drives Oct 5, 2022 Issued
Array ( [id] => 18163770 [patent_doc_number] => 20230030364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/961282 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961282
Memory device having 2-transistor vertical memory cell Oct 5, 2022 Issued
Array ( [id] => 18149001 [patent_doc_number] => 20230022858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME [patent_app_type] => utility [patent_app_number] => 17/960252 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960252 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960252
Distributed compaction of logical states to reduce program time Oct 4, 2022 Issued
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