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Timothy Aberle

Examiner (ID: 10651)

Most Active Art Unit
3501
Art Unit(s)
3501
Total Applications
113
Issued Applications
106
Pending Applications
0
Abandoned Applications
7

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19137833 [patent_doc_number] => 11972804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Techniques for checking vulnerability to cross-temperature read errors in a memory device [patent_app_type] => utility [patent_app_number] => 17/846452 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 28 [patent_no_of_words] => 14340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846452 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846452
Techniques for checking vulnerability to cross-temperature read errors in a memory device Jun 21, 2022 Issued
Array ( [id] => 19244333 [patent_doc_number] => 12014784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Evaluation of background leakage to select write voltage in memory devices [patent_app_type] => utility [patent_app_number] => 17/845174 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 11438 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845174
Evaluation of background leakage to select write voltage in memory devices Jun 20, 2022 Issued
Array ( [id] => 17932965 [patent_doc_number] => 20220328091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SIGNAL TIMING ALIGNMENT BASED ON A COMMON DATA STROBE IN MEMORY DEVICES CONFIGURED FOR STACKED ARRANGEMENTS [patent_app_type] => utility [patent_app_number] => 17/843026 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843026
Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Jun 16, 2022 Issued
Array ( [id] => 19016069 [patent_doc_number] => 11923009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Compact K-SAT verification with TCAMS [patent_app_type] => utility [patent_app_number] => 17/841532 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7641 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841532
Compact K-SAT verification with TCAMS Jun 14, 2022 Issued
Array ( [id] => 18661021 [patent_doc_number] => 20230307034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => METHOD AND APPARATUS FOR DETERMINING SENSE BOUNDARY OF SENSE AMPLIFIER, MEDIUM, AND DEVICE [patent_app_type] => utility [patent_app_number] => 17/807119 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8944 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807119 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807119
Method and apparatus for determining sense boundary of sense amplifier, medium, and device Jun 14, 2022 Issued
Array ( [id] => 18394548 [patent_doc_number] => 20230162769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => MEMORY DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/832261 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832261 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/832261
Memory device and method Jun 2, 2022 Issued
Array ( [id] => 18950775 [patent_doc_number] => 11894078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Accessing a multi-level memory cell [patent_app_type] => utility [patent_app_number] => 17/825941 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 15726 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825941 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825941
Accessing a multi-level memory cell May 25, 2022 Issued
Array ( [id] => 17833367 [patent_doc_number] => 20220270671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM INCLUDING THE SAME AND OPERATING METHOD FOR A SEMICONDUCTOR SYSTEM [patent_app_type] => utility [patent_app_number] => 17/742480 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742480
Semiconductor device, semiconductor system including the same and operating method for a semiconductor system May 11, 2022 Issued
Array ( [id] => 18757230 [patent_doc_number] => 20230360688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR DEVICE HAVING POWER CONTROL CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/740200 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17740200 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/740200
Semiconductor device having power control circuit May 8, 2022 Issued
Array ( [id] => 17795330 [patent_doc_number] => 20220254422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => STORAGE DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/729048 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17729048 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/729048
Storage device and method of operating the same Apr 25, 2022 Issued
Array ( [id] => 18585716 [patent_doc_number] => 20230267980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => LAYOUT OF DELAY CIRCUIT UNIT, LAYOUT OF DELAY CIRCUIT, AND SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/728054 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17728054 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/728054
Layout of delay circuit unit, layout of delay circuit, and semiconductor memory Apr 24, 2022 Issued
Array ( [id] => 18139894 [patent_doc_number] => 20230013730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => PHYSICALLY UNCLONABLE FUNCTION CELL AND OPERATION METHOD OF SAME [patent_app_type] => utility [patent_app_number] => 17/719155 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17719155 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/719155
Physically unclonable function cell and operation method of same Apr 11, 2022 Issued
Array ( [id] => 17764552 [patent_doc_number] => 20220238165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => MEMORY CELL SENSING [patent_app_type] => utility [patent_app_number] => 17/718435 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17718435 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/718435
Memory cell sensing Apr 11, 2022 Issued
Array ( [id] => 18698486 [patent_doc_number] => 20230328966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => METAL GATE MEMORY DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/717406 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717406 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717406
METAL GATE MEMORY DEVICE AND METHOD Apr 10, 2022 Pending
Array ( [id] => 18874419 [patent_doc_number] => 11862240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Circuit structure and related method for radiation resistant memory cell [patent_app_type] => utility [patent_app_number] => 17/658189 [patent_app_country] => US [patent_app_date] => 2022-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17658189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/658189
Circuit structure and related method for radiation resistant memory cell Apr 5, 2022 Issued
Array ( [id] => 17752482 [patent_doc_number] => 20220230687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => NON-VOLATILE MEMORY DEVICE, STORAGE DEVICE AND PROGRAM METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/714552 [patent_app_country] => US [patent_app_date] => 2022-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17714552 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/714552
Non-volatile memory device, storage device and program method thereof Apr 5, 2022 Issued
Array ( [id] => 17737732 [patent_doc_number] => 20220223194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => CLOCK CIRCUIT AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/709708 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709708 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/709708
Clock circuit and memory Mar 30, 2022 Issued
Array ( [id] => 18679501 [patent_doc_number] => 20230317157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => REVERSE PROGRAMMED RESISTIVE RANDOM ACCESS MEMORY (RAM) FOR ONE TIME PROGRAMMABLE (OTP) APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/707444 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/707444
Reverse programmed resistive random access memory (RAM) for one time programmable (OTP) applications Mar 28, 2022 Issued
Array ( [id] => 18804139 [patent_doc_number] => 11837302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-05 [patent_title] => Systems and methods for writing and reading data stored in a polymer using nano-channels [patent_app_type] => utility [patent_app_number] => 17/656640 [patent_app_country] => US [patent_app_date] => 2022-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 34 [patent_no_of_words] => 14603 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17656640 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/656640
Systems and methods for writing and reading data stored in a polymer using nano-channels Mar 24, 2022 Issued
Array ( [id] => 18307944 [patent_doc_number] => 20230111844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => MEMORY DEVICE INCLUDING PARTIAL PAGES IN MEMORY BLOCKS [patent_app_type] => utility [patent_app_number] => 17/703855 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703855 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703855
Memory device including partial pages in memory blocks Mar 23, 2022 Issued
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