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Timothy Aberle

Examiner (ID: 10651)

Most Active Art Unit
3501
Art Unit(s)
3501
Total Applications
113
Issued Applications
106
Pending Applications
0
Abandoned Applications
7

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18695156 [patent_doc_number] => 20230325576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => INTERCONNECTIONS FOR MODULAR DIE DESIGNS [patent_app_type] => utility [patent_app_number] => 17/655823 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/655823
Interconnections for modular die designs Mar 21, 2022 Issued
Array ( [id] => 17710236 [patent_doc_number] => 20220210244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => MEMORY DEVICE WITH A MULTI-MODE COMMUNICATION MECHANISM [patent_app_type] => utility [patent_app_number] => 17/698952 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17698952 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/698952
Memory device with a multi-mode communication mechanism Mar 17, 2022 Issued
Array ( [id] => 18950760 [patent_doc_number] => 11894063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/695060 [patent_app_country] => US [patent_app_date] => 2022-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 15208 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17695060 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/695060
Semiconductor memory device Mar 14, 2022 Issued
Array ( [id] => 18839967 [patent_doc_number] => 11848046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Sense amplifier and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/694771 [patent_app_country] => US [patent_app_date] => 2022-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4711 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694771 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694771
Sense amplifier and operation method thereof Mar 14, 2022 Issued
Array ( [id] => 18363800 [patent_doc_number] => 20230145391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => FERROMAGNETIC FREE LAYER, PREPARATION METHOD AND APPLICATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/694960 [patent_app_country] => US [patent_app_date] => 2022-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694960 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694960
FERROMAGNETIC FREE LAYER, PREPARATION METHOD AND APPLICATION THEREOF Mar 14, 2022 Pending
Array ( [id] => 18631496 [patent_doc_number] => 20230290398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => PARTIAL PULSE PAIRING FOR IMPROVED READ SIGNAL QUALITY [patent_app_type] => utility [patent_app_number] => 17/694442 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694442
Partial pulse pairing for improved read signal quality Mar 13, 2022 Issued
Array ( [id] => 17691874 [patent_doc_number] => 20220199167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => ONE TIME PROGRAMMABLE MEMORY [patent_app_type] => utility [patent_app_number] => 17/693908 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693908 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/693908
One time programmable memory Mar 13, 2022 Issued
Array ( [id] => 18235777 [patent_doc_number] => 11600341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Semiconductor integrated circuit, memory controller, and memory system [patent_app_type] => utility [patent_app_number] => 17/688167 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 12329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688167 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/688167
Semiconductor integrated circuit, memory controller, and memory system Mar 6, 2022 Issued
Array ( [id] => 18983323 [patent_doc_number] => 11908508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Memory with partial array refresh [patent_app_type] => utility [patent_app_number] => 17/684235 [patent_app_country] => US [patent_app_date] => 2022-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 9742 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684235 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684235
Memory with partial array refresh Feb 28, 2022 Issued
Array ( [id] => 18244873 [patent_doc_number] => 20230077184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => APPARATUS AND METHOD FOR PROGRAMMING DATA IN A NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/669972 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17669972 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/669972
Apparatus and method for programming data in a non-volatile memory device Feb 10, 2022 Issued
Array ( [id] => 17870428 [patent_doc_number] => 20220293165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => Memory Device Having Variable Impedance Memory Cells and Time-To-Transition Sensing of Data Stored Therein [patent_app_type] => utility [patent_app_number] => 17/649342 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649342 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649342
Memory device having variable impedance memory cells and time-to-transition sensing of data stored therein Jan 27, 2022 Issued
Array ( [id] => 18998913 [patent_doc_number] => 11915767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Negative voltage switching device and non-volatile memory device using the same [patent_app_type] => utility [patent_app_number] => 17/568190 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8069 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568190 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568190
Negative voltage switching device and non-volatile memory device using the same Jan 3, 2022 Issued
Array ( [id] => 18387103 [patent_doc_number] => 11657892 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-23 [patent_title] => Repairable latch array [patent_app_type] => utility [patent_app_number] => 17/561115 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 14 [patent_no_of_words] => 8169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561115 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561115
Repairable latch array Dec 22, 2021 Issued
Array ( [id] => 19062898 [patent_doc_number] => 11942143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Semiconductor memory devices [patent_app_type] => utility [patent_app_number] => 17/559110 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13878 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17559110 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/559110
Semiconductor memory devices Dec 21, 2021 Issued
Array ( [id] => 18097066 [patent_doc_number] => 20220415407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => NON-VOLATILE MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND READ METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/559243 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17559243 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/559243
Non-volatile memory device, memory system including the same and read method of memory system Dec 21, 2021 Issued
Array ( [id] => 18493310 [patent_doc_number] => 11698726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Apparatuses and methods for configurable memory array bank architectures [patent_app_type] => utility [patent_app_number] => 17/645101 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 14844 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645101
Apparatuses and methods for configurable memory array bank architectures Dec 19, 2021 Issued
Array ( [id] => 18455893 [patent_doc_number] => 20230197174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SYSTEMS AND METHODS FOR ADAPTING SENSE TIME [patent_app_type] => utility [patent_app_number] => 17/556477 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556477
Systems and methods for adapting sense time Dec 19, 2021 Issued
Array ( [id] => 18639289 [patent_doc_number] => 11763905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Storage system and method for data protection during power loss [patent_app_type] => utility [patent_app_number] => 17/553024 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 10255 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17553024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/553024
Storage system and method for data protection during power loss Dec 15, 2021 Issued
Array ( [id] => 18292179 [patent_doc_number] => 11621052 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-04 [patent_title] => Method for testing memory device and test system [patent_app_type] => utility [patent_app_number] => 17/643841 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1857 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17643841 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/643841
Method for testing memory device and test system Dec 12, 2021 Issued
Array ( [id] => 17508821 [patent_doc_number] => 20220101924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/548664 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18514 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548664 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548664
Semiconductor memory device Dec 12, 2021 Issued
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