Search

Timothy C Vanoy

Examiner (ID: 16970, Phone: (571)272-8158 , Office: P/1736 )

Most Active Art Unit
1736
Art Unit(s)
1754, 1734, 1793, 1735, 1736, 1103, 1724
Total Applications
3741
Issued Applications
3215
Pending Applications
124
Abandoned Applications
402

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16000823 [patent_doc_number] => 20200176282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SUBSTRATE FIXING DEVICE [patent_app_type] => utility [patent_app_number] => 16/691885 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691885
Substrate fixing device Nov 21, 2019 Issued
Array ( [id] => 16858461 [patent_doc_number] => 20210159206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => CONTAMINANT CONTROL IN THERMOCOMPRESSION BONDING OF SEMICONDUCTORS AND ASSOCIATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/693192 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693192 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693192
Contaminant control in thermocompression bonding of semiconductors and associated systems and methods Nov 21, 2019 Issued
Array ( [id] => 17189215 [patent_doc_number] => 20210336100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/622943 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16622943 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/622943
DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE Nov 20, 2019 Abandoned
Array ( [id] => 17247443 [patent_doc_number] => 20210367188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => THIN FILM ENCAPSULATION LAYER, ORGANIC LIGHT-EMITTING DIODE DEVICE, AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/623059 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16623059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/623059
THIN FILM ENCAPSULATION LAYER, ORGANIC LIGHT-EMITTING DIODE DEVICE, AND FABRICATING METHOD THEREOF Nov 14, 2019 Abandoned
Array ( [id] => 15625411 [patent_doc_number] => 20200083110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => Self-Aligned Nanowire Formation Using Double Patterning [patent_app_type] => utility [patent_app_number] => 16/682884 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682884 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682884
Self-aligned nanowire formation using double patterning Nov 12, 2019 Issued
Array ( [id] => 16078607 [patent_doc_number] => 20200193290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => THICKNESS PREDICTION NETWORK LEARNING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND SEMICONDUCTOR MATERIAL DEPOSITION EQUIPMENT [patent_app_type] => utility [patent_app_number] => 16/678755 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9783 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678755 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678755
Thickness prediction network learning method, semiconductor device manufacturing method, and semiconductor material deposition equipment Nov 7, 2019 Issued
Array ( [id] => 15840661 [patent_doc_number] => 20200135613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL DISSIPATION AND METHOD FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/665783 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16665783 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/665783
Semiconductor device with enhanced thermal dissipation and method for making the same Oct 27, 2019 Issued
Array ( [id] => 16502732 [patent_doc_number] => 10868133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Semiconductor device structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/665296 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6398 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16665296 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/665296
Semiconductor device structure and method for forming the same Oct 27, 2019 Issued
Array ( [id] => 16796134 [patent_doc_number] => 20210125951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => INTEGRATED DEVICE COMPRISING INTERCONNECT STRUCTURES HAVING AN INNER INTERCONNECT, A DIELECTRIC LAYER AND A CONDUCTIVE LAYER [patent_app_type] => utility [patent_app_number] => 16/665883 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16665883 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/665883
Integrated device comprising interconnect structures having an inner interconnect, a dielectric layer and a conductive layer Oct 27, 2019 Issued
Array ( [id] => 15841437 [patent_doc_number] => 20200136001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => LED Light Source [patent_app_type] => utility [patent_app_number] => 16/661821 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661821 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661821
LED light source Oct 22, 2019 Issued
Array ( [id] => 17224778 [patent_doc_number] => 11177288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Display device comprising a plurality of thin film transistors and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/661760 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 13708 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661760 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661760
Display device comprising a plurality of thin film transistors and method for manufacturing the same Oct 22, 2019 Issued
Array ( [id] => 17716580 [patent_doc_number] => 11380578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Formation of angled gratings [patent_app_type] => utility [patent_app_number] => 16/656798 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 33 [patent_no_of_words] => 11493 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656798 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656798
Formation of angled gratings Oct 17, 2019 Issued
Array ( [id] => 15461819 [patent_doc_number] => 20200043734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => SYSTEMS AND METHODS FOR MATERIAL BREAKTHROUGH [patent_app_type] => utility [patent_app_number] => 16/599447 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12838 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/599447
SYSTEMS AND METHODS FOR MATERIAL BREAKTHROUGH Oct 10, 2019 Abandoned
Array ( [id] => 15462457 [patent_doc_number] => 20200044053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => NANOSHEET TRANSITOR WITH OPTIMIZED JUNCTION AND CLADDING DEFECTIVITY CONTROL [patent_app_type] => utility [patent_app_number] => 16/600050 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8823 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600050
Nanosheet transistor with optimized junction and cladding detectivity control Oct 10, 2019 Issued
Array ( [id] => 15462477 [patent_doc_number] => 20200044063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => VERTICAL TUNNEL FIELD EFFECT TRANSISTOR (FET) [patent_app_type] => utility [patent_app_number] => 16/594404 [patent_app_country] => US [patent_app_date] => 2019-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16594404 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/594404
Vertical tunnel field effect transistor (FET) Oct 6, 2019 Issued
Array ( [id] => 15332535 [patent_doc_number] => 20200006597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => GROWTH OF CUBIC CRYSTALLINE PHASE STRUCTURE ON SILICON SUBSTRATES AND DEVICES COMPRISING THE CUBIC CRYSTALLINE PHASE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/567535 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19663 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567535
Growth of cubic crystalline phase structure on silicon substrates and devices comprising the cubic crystalline phase structure Sep 10, 2019 Issued
Array ( [id] => 15300503 [patent_doc_number] => 20190393387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/564556 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564556
Display apparatus and manufacturing method thereof Sep 8, 2019 Issued
Array ( [id] => 16774039 [patent_doc_number] => 10985160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Semiconductor structures and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/562650 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 6272 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562650
Semiconductor structures and methods of forming the same Sep 5, 2019 Issued
Array ( [id] => 15922229 [patent_doc_number] => 10658363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Cut inside replacement metal gate trench to mitigate N-P proximity effect [patent_app_type] => utility [patent_app_number] => 16/562481 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2708 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562481 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562481
Cut inside replacement metal gate trench to mitigate N-P proximity effect Sep 5, 2019 Issued
Array ( [id] => 16677389 [patent_doc_number] => 20210066155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => MICROELECTRONICS PACKAGE COMPRISING A PACKAGE-ON-PACKAGE (POP) ARCHITECTURE WITH INKJET BARRIER MATERIAL FOR CONTROLLING BONDLINE THICKNESS AND POP ADHESIVE KEEP OUT ZONE [patent_app_type] => utility [patent_app_number] => 16/557784 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557784 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557784
MICROELECTRONICS PACKAGE COMPRISING A PACKAGE-ON-PACKAGE (POP) ARCHITECTURE WITH INKJET BARRIER MATERIAL FOR CONTROLLING BONDLINE THICKNESS AND POP ADHESIVE KEEP OUT ZONE Aug 29, 2019 Pending
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