Search

Timothy C Vanoy

Examiner (ID: 16970, Phone: (571)272-8158 , Office: P/1736 )

Most Active Art Unit
1736
Art Unit(s)
1754, 1734, 1793, 1735, 1736, 1103, 1724
Total Applications
3741
Issued Applications
3215
Pending Applications
124
Abandoned Applications
402

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16677540 [patent_doc_number] => 20210066306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => ARRAY OF CAPACITORS, AN ARRAY OF MEMORY CELLS, A METHOD OF FORMING AN ARRAY OF CAPACITORS, AND A METHOD OF FORMING AN ARRAY OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/550917 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550917 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550917
Array of capacitors, an array of memory cells, a method of forming an array of capacitors, and a method of forming an array of memory cells Aug 25, 2019 Issued
Array ( [id] => 17769233 [patent_doc_number] => 11401158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Sensor packages [patent_app_type] => utility [patent_app_number] => 16/549003 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3739 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549003 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549003
Sensor packages Aug 22, 2019 Issued
Array ( [id] => 17196189 [patent_doc_number] => 11164956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Capping layer for gate electrodes [patent_app_type] => utility [patent_app_number] => 16/548918 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16548918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/548918
Capping layer for gate electrodes Aug 22, 2019 Issued
Array ( [id] => 15323663 [patent_doc_number] => 20200002161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => METHOD OF FORMING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/544234 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544234
Method of forming semiconductor package and semiconductor package Aug 18, 2019 Issued
Array ( [id] => 16675340 [patent_doc_number] => 20210064104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => WIRING STRUCTURE, PREPARATION METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/643919 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16643919 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/643919
Wiring structure, preparation method thereof, and display device Aug 13, 2019 Issued
Array ( [id] => 17063284 [patent_doc_number] => 11107897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Methods of forming semiconductor devices and FinFET devices having shielding layers [patent_app_type] => utility [patent_app_number] => 16/524137 [patent_app_country] => US [patent_app_date] => 2019-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4241 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16524137 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/524137
Methods of forming semiconductor devices and FinFET devices having shielding layers Jul 27, 2019 Issued
Array ( [id] => 16653418 [patent_doc_number] => 10930611 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-23 [patent_title] => Solder joints for board level reliability [patent_app_type] => utility [patent_app_number] => 16/523950 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3844 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16523950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/523950
Solder joints for board level reliability Jul 25, 2019 Issued
Array ( [id] => 15657537 [patent_doc_number] => 20200091299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/521201 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521201 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521201
Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device Jul 23, 2019 Issued
Array ( [id] => 17395938 [patent_doc_number] => 11244962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Display substrate, display device, mobile terminal and fabricating method of display substrate [patent_app_type] => utility [patent_app_number] => 16/521530 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4963 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521530 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521530
Display substrate, display device, mobile terminal and fabricating method of display substrate Jul 23, 2019 Issued
Array ( [id] => 16896713 [patent_doc_number] => 11038277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => High impedance surface (HIS) enhanced by discrete passives [patent_app_type] => utility [patent_app_number] => 16/521477 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5805 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521477
High impedance surface (HIS) enhanced by discrete passives Jul 23, 2019 Issued
Array ( [id] => 17107581 [patent_doc_number] => 11127807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Display device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/521394 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6713 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521394 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521394
Display device and manufacturing method thereof Jul 23, 2019 Issued
Array ( [id] => 16746453 [patent_doc_number] => 10971454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/521271 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9800 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521271 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521271
Semiconductor package Jul 23, 2019 Issued
Array ( [id] => 16835168 [patent_doc_number] => 11011427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => System and method for widening fin widths for small pitch FinFET devices [patent_app_type] => utility [patent_app_number] => 16/506808 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 6179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506808
System and method for widening fin widths for small pitch FinFET devices Jul 8, 2019 Issued
Array ( [id] => 15351991 [patent_doc_number] => 20200013887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => OPEN TYPE HETEROJUNCTION TRANSISTOR HAVING A REDUCED TRANSITION RESISTANCE [patent_app_type] => utility [patent_app_number] => 16/459942 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459942 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459942
Open type heterojunction transistor having a reduced transition resistance Jul 1, 2019 Issued
Array ( [id] => 15874081 [patent_doc_number] => 20200144444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/459859 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459859 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459859
Light emitting device Jul 1, 2019 Issued
Array ( [id] => 16988104 [patent_doc_number] => 11075287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Semiconductor structure and forming method thereof [patent_app_type] => utility [patent_app_number] => 16/459978 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 28 [patent_no_of_words] => 10188 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459978 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459978
Semiconductor structure and forming method thereof Jul 1, 2019 Issued
Array ( [id] => 16528912 [patent_doc_number] => 20200402993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => Integrated Assemblies Having Metal-Containing Liners Along Bottoms of Trenches, and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 16/445065 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -37 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445065 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445065
Integrated assemblies having metal-containing liners along bottoms of trenches, and methods of forming integrated assemblies Jun 17, 2019 Issued
Array ( [id] => 15274779 [patent_doc_number] => 20190386124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => MOS DEVICES WITH INCREASED SHORT CIRCUIT ROBUSTNESS [patent_app_type] => utility [patent_app_number] => 16/438055 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -45 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438055
MOS DEVICES WITH INCREASED SHORT CIRCUIT ROBUSTNESS Jun 10, 2019 Abandoned
Array ( [id] => 16509501 [patent_doc_number] => 20200388757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => BOTTOM ELECTRODE STRUCTURE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/436308 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436308 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436308
Bottom electrode structure and method of forming the same Jun 9, 2019 Issued
Array ( [id] => 15274249 [patent_doc_number] => 20190385859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/436254 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436254 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436254
Semiconductor device manufacturing method and semiconductor device Jun 9, 2019 Issued
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