Search

Timothy J. Dole

Examiner (ID: 5813)

Most Active Art Unit
2858
Art Unit(s)
2838, 2831, 2847, 2858, 2859, 2848
Total Applications
663
Issued Applications
501
Pending Applications
40
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6417779 [patent_doc_number] => 20020125899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Method and apparatus for on-line monitoring of quality and/or condition of highly resistive fluids' [patent_app_type] => new [patent_app_number] => 09/803299 [patent_app_country] => US [patent_app_date] => 2001-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9668 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20020125899.pdf [firstpage_image] =>[orig_patent_app_number] => 09803299 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/803299
Method and apparatus for on-line monitoring of quality and/or condition of highly resistive fluids Mar 8, 2001 Issued
Array ( [id] => 5856841 [patent_doc_number] => 20020121910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Electronics board life prediction of microprocessor-based transmitters' [patent_app_type] => new [patent_app_number] => 09/799824 [patent_app_country] => US [patent_app_date] => 2001-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2375 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20020121910.pdf [firstpage_image] =>[orig_patent_app_number] => 09799824 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/799824
Electronics board life prediction of microprocessor-based transmitters Mar 4, 2001 Issued
Array ( [id] => 1294027 [patent_doc_number] => 06630832 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-07 [patent_title] => 'Method and apparatus for the electrical testing of printed circuit boards employing intermediate layer grounding' [patent_app_type] => B1 [patent_app_number] => 09/719753 [patent_app_country] => US [patent_app_date] => 2001-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 19917 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/630/06630832.pdf [firstpage_image] =>[orig_patent_app_number] => 09719753 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/719753
Method and apparatus for the electrical testing of printed circuit boards employing intermediate layer grounding Feb 26, 2001 Issued
09/743374 Device without set-up kit for the targeted moving of electronic components Feb 19, 2001 Abandoned
Array ( [id] => 1300987 [patent_doc_number] => 06628123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Method for controlling a transducer device in level sensors and device for carrying out such a method' [patent_app_type] => B2 [patent_app_number] => 09/785441 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2559 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/628/06628123.pdf [firstpage_image] =>[orig_patent_app_number] => 09785441 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/785441
Method for controlling a transducer device in level sensors and device for carrying out such a method Feb 19, 2001 Issued
Array ( [id] => 1337779 [patent_doc_number] => 06597162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-22 [patent_title] => 'PLL semiconductor device with testability, and method and apparatus for testing same' [patent_app_type] => B2 [patent_app_number] => 09/757492 [patent_app_country] => US [patent_app_date] => 2001-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 3838 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/597/06597162.pdf [firstpage_image] =>[orig_patent_app_number] => 09757492 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/757492
PLL semiconductor device with testability, and method and apparatus for testing same Jan 10, 2001 Issued
Array ( [id] => 1064026 [patent_doc_number] => 06850075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-01 [patent_title] => 'SRAM self-timed write stress test mode' [patent_app_type] => utility [patent_app_number] => 09/747734 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4804 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850075.pdf [firstpage_image] =>[orig_patent_app_number] => 09747734 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/747734
SRAM self-timed write stress test mode Dec 21, 2000 Issued
Array ( [id] => 7626465 [patent_doc_number] => 06768297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'High speed VLSI digital tester architecture for real-time output timing acquisition, results accumulation, and analysis' [patent_app_type] => B2 [patent_app_number] => 09/725401 [patent_app_country] => US [patent_app_date] => 2000-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7179 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/768/06768297.pdf [firstpage_image] =>[orig_patent_app_number] => 09725401 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/725401
High speed VLSI digital tester architecture for real-time output timing acquisition, results accumulation, and analysis Nov 28, 2000 Issued
09/472078 DATA PROCESSING SYSTEMS HAVING MISMATCHED IMPEDANCE COMPONENTS Dec 22, 1999 Abandoned
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