
Timothy P. Callahan
Director (ID: 5413, Phone: (571)272-4066 , Office: P/2400 )
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2899, 2504, 2816 |
| Total Applications | 793 |
| Issued Applications | 652 |
| Pending Applications | 7 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2937949
[patent_doc_number] => 05189322
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-02-23
[patent_title] => 'Low-power sense amplifier with feedback'
[patent_app_type] => 1
[patent_app_number] => 7/500637
[patent_app_country] => US
[patent_app_date] => 1990-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 6829
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/189/05189322.pdf
[firstpage_image] =>[orig_patent_app_number] => 500637
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/500637 | Low-power sense amplifier with feedback | Mar 27, 1990 | Issued |
Array
(
[id] => 2737168
[patent_doc_number] => 05039873
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-13
[patent_title] => 'Microwave elements with impedance control circuits'
[patent_app_type] => 1
[patent_app_number] => 7/497306
[patent_app_country] => US
[patent_app_date] => 1990-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 2443
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/039/05039873.pdf
[firstpage_image] =>[orig_patent_app_number] => 497306
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/497306 | Microwave elements with impedance control circuits | Mar 21, 1990 | Issued |
Array
(
[id] => 2795160
[patent_doc_number] => 05103114
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-07
[patent_title] => 'Circuit technique for creating predetermined duty cycle'
[patent_app_type] => 1
[patent_app_number] => 7/495465
[patent_app_country] => US
[patent_app_date] => 1990-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1439
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 383
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/103/05103114.pdf
[firstpage_image] =>[orig_patent_app_number] => 495465
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/495465 | Circuit technique for creating predetermined duty cycle | Mar 18, 1990 | Issued |
| 07/496050 | VARIABLE DELAY LINE PHASE-LOCKED LOOP CIRCUIT SYNCHRONIZATION SYSTEM | Mar 15, 1990 | Abandoned |
Array
(
[id] => 2855149
[patent_doc_number] => 05105160
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-14
[patent_title] => 'Phase comparator using digital and analogue phase detectors'
[patent_app_type] => 1
[patent_app_number] => 7/494034
[patent_app_country] => US
[patent_app_date] => 1990-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3291
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/105/05105160.pdf
[firstpage_image] =>[orig_patent_app_number] => 494034
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/494034 | Phase comparator using digital and analogue phase detectors | Mar 13, 1990 | Issued |
Array
(
[id] => 2851921
[patent_doc_number] => 05107145
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-21
[patent_title] => 'High speed current mode logic circuit with constant logic level current'
[patent_app_type] => 1
[patent_app_number] => 7/492639
[patent_app_country] => US
[patent_app_date] => 1990-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5246
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 256
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/107/05107145.pdf
[firstpage_image] =>[orig_patent_app_number] => 492639
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/492639 | High speed current mode logic circuit with constant logic level current | Mar 12, 1990 | Issued |
| 07/490655 | SWITCHED CAPACITOR CIRCUIT | Mar 7, 1990 | Abandoned |
Array
(
[id] => 2750845
[patent_doc_number] => 05015884
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-14
[patent_title] => 'Multiple array high performance programmable logic device family'
[patent_app_type] => 1
[patent_app_number] => 7/490808
[patent_app_country] => US
[patent_app_date] => 1990-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 80
[patent_figures_cnt] => 92
[patent_no_of_words] => 22958
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/015/05015884.pdf
[firstpage_image] =>[orig_patent_app_number] => 490808
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/490808 | Multiple array high performance programmable logic device family | Mar 6, 1990 | Issued |
| 07/489775 | PROGRAMMABLE LOGIC DEVICE WITH OBSERVABLE INTERNAL STATES | Mar 4, 1990 | Abandoned |
Array
(
[id] => 2777903
[patent_doc_number] => 05075582
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-24
[patent_title] => 'Integratable bandpass filter circuit'
[patent_app_type] => 1
[patent_app_number] => 7/487933
[patent_app_country] => US
[patent_app_date] => 1990-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1575
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/075/05075582.pdf
[firstpage_image] =>[orig_patent_app_number] => 487933
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/487933 | Integratable bandpass filter circuit | Mar 4, 1990 | Issued |
Array
(
[id] => 2686089
[patent_doc_number] => 05045732
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-03
[patent_title] => 'Polygon circuit'
[patent_app_type] => 1
[patent_app_number] => 7/493829
[patent_app_country] => US
[patent_app_date] => 1990-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2788
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/045/05045732.pdf
[firstpage_image] =>[orig_patent_app_number] => 493829
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/493829 | Polygon circuit | Feb 26, 1990 | Issued |
Array
(
[id] => 2791139
[patent_doc_number] => 05093628
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-03
[patent_title] => 'Current-pulse integrating circuit and phase-locked loop'
[patent_app_type] => 1
[patent_app_number] => 7/485151
[patent_app_country] => US
[patent_app_date] => 1990-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2188
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/093/05093628.pdf
[firstpage_image] =>[orig_patent_app_number] => 485151
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/485151 | Current-pulse integrating circuit and phase-locked loop | Feb 25, 1990 | Issued |
Array
(
[id] => 2810612
[patent_doc_number] => 05157286
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-20
[patent_title] => 'Conditional clocking of the second latch of a shift register ratch'
[patent_app_type] => 1
[patent_app_number] => 7/484144
[patent_app_country] => US
[patent_app_date] => 1990-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2363
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/157/05157286.pdf
[firstpage_image] =>[orig_patent_app_number] => 484144
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/484144 | Conditional clocking of the second latch of a shift register ratch | Feb 22, 1990 | Issued |
Array
(
[id] => 2877704
[patent_doc_number] => 05091664
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-25
[patent_title] => 'Insulated gate bipolar transistor circuit with overcurrent protection'
[patent_app_type] => 1
[patent_app_number] => 7/482896
[patent_app_country] => US
[patent_app_date] => 1990-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2530
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/091/05091664.pdf
[firstpage_image] =>[orig_patent_app_number] => 482896
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/482896 | Insulated gate bipolar transistor circuit with overcurrent protection | Feb 21, 1990 | Issued |
Array
(
[id] => 2713790
[patent_doc_number] => 05017801
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-21
[patent_title] => 'Method and apparatus for converting a gap-infested read-in clock into a gap-free read-out clock'
[patent_app_type] => 1
[patent_app_number] => 7/476714
[patent_app_country] => US
[patent_app_date] => 1990-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 1951
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 284
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/017/05017801.pdf
[firstpage_image] =>[orig_patent_app_number] => 476714
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/476714 | Method and apparatus for converting a gap-infested read-in clock into a gap-free read-out clock | Feb 7, 1990 | Issued |
Array
(
[id] => 2851815
[patent_doc_number] => 05111063
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-05
[patent_title] => 'Integrated clock driver circuit'
[patent_app_type] => 1
[patent_app_number] => 7/474613
[patent_app_country] => US
[patent_app_date] => 1990-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3128
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/111/05111063.pdf
[firstpage_image] =>[orig_patent_app_number] => 474613
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/474613 | Integrated clock driver circuit | Feb 4, 1990 | Issued |
Array
(
[id] => 2737590
[patent_doc_number] => 05051618
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-24
[patent_title] => 'High voltage system using enhancement and depletion field effect transistors'
[patent_app_type] => 1
[patent_app_number] => 7/468917
[patent_app_country] => US
[patent_app_date] => 1990-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 1905
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/051/05051618.pdf
[firstpage_image] =>[orig_patent_app_number] => 468917
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/468917 | High voltage system using enhancement and depletion field effect transistors | Jan 22, 1990 | Issued |
Array
(
[id] => 2729599
[patent_doc_number] => 05057785
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-15
[patent_title] => 'Method and circuitry to suppress additive disturbances in data channels'
[patent_app_type] => 1
[patent_app_number] => 7/468526
[patent_app_country] => US
[patent_app_date] => 1990-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2378
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/057/05057785.pdf
[firstpage_image] =>[orig_patent_app_number] => 468526
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/468526 | Method and circuitry to suppress additive disturbances in data channels | Jan 22, 1990 | Issued |
Array
(
[id] => 2753166
[patent_doc_number] => 05030859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-09
[patent_title] => 'Drive device for a CMOS sense amplifier in a dynamic semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/454443
[patent_app_country] => US
[patent_app_date] => 1989-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2123
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/030/05030859.pdf
[firstpage_image] =>[orig_patent_app_number] => 454443
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/454443 | Drive device for a CMOS sense amplifier in a dynamic semiconductor memory device | Dec 20, 1989 | Issued |
Array
(
[id] => 2831476
[patent_doc_number] => 05117135
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-26
[patent_title] => 'Frequency and phase detection circuit in NRZ bit synchronous system'
[patent_app_type] => 1
[patent_app_number] => 7/454160
[patent_app_country] => US
[patent_app_date] => 1989-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1570
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/117/05117135.pdf
[firstpage_image] =>[orig_patent_app_number] => 454160
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/454160 | Frequency and phase detection circuit in NRZ bit synchronous system | Dec 20, 1989 | Issued |