Search

Timothy P. Callahan

Director (ID: 5413, Phone: (571)272-4066 , Office: P/2400 )

Most Active Art Unit
2504
Art Unit(s)
2899, 2504, 2816
Total Applications
793
Issued Applications
652
Pending Applications
7
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2771725 [patent_doc_number] => 05006810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-09 [patent_title] => 'Second order active filters' [patent_app_type] => 1 [patent_app_number] => 7/450790 [patent_app_country] => US [patent_app_date] => 1989-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/006/05006810.pdf [firstpage_image] =>[orig_patent_app_number] => 450790 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/450790
Second order active filters Dec 13, 1989 Issued
07/447739 RISE AND FALL TIME GENERATOR SYSTEM Dec 7, 1989 Abandoned
07/447275 BIAS CURRENT MODULATION FOR DIFFERENTIALLY COUPLED TRANSISTOR CIRCUIT Dec 6, 1989 Abandoned
Array ( [id] => 2786206 [patent_doc_number] => 05087829 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-11 [patent_title] => 'High speed clock distribution system' [patent_app_type] => 1 [patent_app_number] => 7/443503 [patent_app_country] => US [patent_app_date] => 1989-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 10489 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/087/05087829.pdf [firstpage_image] =>[orig_patent_app_number] => 443503 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/443503
High speed clock distribution system Nov 30, 1989 Issued
Array ( [id] => 2662596 [patent_doc_number] => 04978867 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-18 [patent_title] => 'Integrated circuit with on-chip voltage converter' [patent_app_type] => 1 [patent_app_number] => 7/445896 [patent_app_country] => US [patent_app_date] => 1989-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2654 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/978/04978867.pdf [firstpage_image] =>[orig_patent_app_number] => 445896 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/445896
Integrated circuit with on-chip voltage converter Nov 30, 1989 Issued
Array ( [id] => 2767374 [patent_doc_number] => 04994693 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Second order active filters' [patent_app_type] => 1 [patent_app_number] => 7/443298 [patent_app_country] => US [patent_app_date] => 1989-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2008 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/994/04994693.pdf [firstpage_image] =>[orig_patent_app_number] => 443298 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/443298
Second order active filters Nov 29, 1989 Issued
Array ( [id] => 2778864 [patent_doc_number] => 05075632 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-24 [patent_title] => 'Automatic control using proximity sensors' [patent_app_type] => 1 [patent_app_number] => 7/430931 [patent_app_country] => US [patent_app_date] => 1989-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2834 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/075/05075632.pdf [firstpage_image] =>[orig_patent_app_number] => 430931 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/430931
Automatic control using proximity sensors Nov 1, 1989 Issued
Array ( [id] => 2600127 [patent_doc_number] => 04975600 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-04 [patent_title] => 'Bicmos TTL output driver circuit' [patent_app_type] => 1 [patent_app_number] => 7/430060 [patent_app_country] => US [patent_app_date] => 1989-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1822 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/975/04975600.pdf [firstpage_image] =>[orig_patent_app_number] => 430060 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/430060
Bicmos TTL output driver circuit Oct 29, 1989 Issued
Array ( [id] => 2718559 [patent_doc_number] => 05053643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Integrated circuit including output circuit having input logic controlled by output logic' [patent_app_type] => 1 [patent_app_number] => 7/426040 [patent_app_country] => US [patent_app_date] => 1989-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3298 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053643.pdf [firstpage_image] =>[orig_patent_app_number] => 426040 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/426040
Integrated circuit including output circuit having input logic controlled by output logic Oct 23, 1989 Issued
07/425755 FLAT PULSE GENERATOR Oct 22, 1989 Abandoned
Array ( [id] => 2853451 [patent_doc_number] => 05111151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Digital phase locked loop system' [patent_app_type] => 1 [patent_app_number] => 7/424697 [patent_app_country] => US [patent_app_date] => 1989-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 78 [patent_no_of_words] => 6629 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111151.pdf [firstpage_image] =>[orig_patent_app_number] => 424697 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/424697
Digital phase locked loop system Oct 19, 1989 Issued
Array ( [id] => 2712178 [patent_doc_number] => 05055721 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Drive circuit for IGBT device' [patent_app_type] => 1 [patent_app_number] => 7/422685 [patent_app_country] => US [patent_app_date] => 1989-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6926 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/055/05055721.pdf [firstpage_image] =>[orig_patent_app_number] => 422685 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/422685
Drive circuit for IGBT device Oct 16, 1989 Issued
Array ( [id] => 2858302 [patent_doc_number] => 05126681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'In-wire selective active cancellation system' [patent_app_type] => 1 [patent_app_number] => 7/421759 [patent_app_country] => US [patent_app_date] => 1989-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1756 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/126/05126681.pdf [firstpage_image] =>[orig_patent_app_number] => 421759 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/421759
In-wire selective active cancellation system Oct 15, 1989 Issued
Array ( [id] => 2818209 [patent_doc_number] => 05122679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-16 [patent_title] => 'Integrated logic circuit with clock skew adjusters' [patent_app_type] => 1 [patent_app_number] => 7/421066 [patent_app_country] => US [patent_app_date] => 1989-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3254 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/122/05122679.pdf [firstpage_image] =>[orig_patent_app_number] => 421066 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/421066
Integrated logic circuit with clock skew adjusters Oct 12, 1989 Issued
Array ( [id] => 2737489 [patent_doc_number] => 05039890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-13 [patent_title] => 'Integratable filter circuit' [patent_app_type] => 1 [patent_app_number] => 7/420354 [patent_app_country] => US [patent_app_date] => 1989-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2411 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/039/05039890.pdf [firstpage_image] =>[orig_patent_app_number] => 420354 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/420354
Integratable filter circuit Oct 11, 1989 Issued
Array ( [id] => 2771309 [patent_doc_number] => 05036225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-30 [patent_title] => 'TTL-ECL level converting circuit' [patent_app_type] => 1 [patent_app_number] => 7/417973 [patent_app_country] => US [patent_app_date] => 1989-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3891 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/036/05036225.pdf [firstpage_image] =>[orig_patent_app_number] => 417973 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/417973
TTL-ECL level converting circuit Oct 5, 1989 Issued
07/418301 PHASE CORRECTOR FOR REDUNDANT CLOCK SYSTEMS AND METHOD Oct 5, 1989 Abandoned
Array ( [id] => 2711968 [patent_doc_number] => 04982109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-01 [patent_title] => 'Circuit and method for measuring the duration of a selected pulse in a pulse train' [patent_app_type] => 1 [patent_app_number] => 7/417230 [patent_app_country] => US [patent_app_date] => 1989-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2342 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/982/04982109.pdf [firstpage_image] =>[orig_patent_app_number] => 417230 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/417230
Circuit and method for measuring the duration of a selected pulse in a pulse train Oct 3, 1989 Issued
Array ( [id] => 2749798 [patent_doc_number] => 05012143 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-30 [patent_title] => 'Integrated delay line' [patent_app_type] => 1 [patent_app_number] => 7/417976 [patent_app_country] => US [patent_app_date] => 1989-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3365 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/012/05012143.pdf [firstpage_image] =>[orig_patent_app_number] => 417976 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/417976
Integrated delay line Oct 3, 1989 Issued
Array ( [id] => 2728081 [patent_doc_number] => 05057705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'Clock formation circuit with phase locked loop control' [patent_app_type] => 1 [patent_app_number] => 7/413619 [patent_app_country] => US [patent_app_date] => 1989-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4724 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/057/05057705.pdf [firstpage_image] =>[orig_patent_app_number] => 413619 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/413619
Clock formation circuit with phase locked loop control Sep 27, 1989 Issued
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