| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 05001361
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-19
[patent_title] => 'Master-slave flip-flop circuit'
[patent_app_type] => 1
[patent_app_number] => 7/349251
[patent_app_country] => US
[patent_app_date] => 1989-05-09
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[firstpage_image] =>[orig_patent_app_number] => 349251
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/349251 | Master-slave flip-flop circuit | May 8, 1989 | Issued |
Array
(
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[patent_doc_number] => 05030856
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-09
[patent_title] => 'Receiver and level converter circuit with dual feedback'
[patent_app_type] => 1
[patent_app_number] => 7/347542
[patent_app_country] => US
[patent_app_date] => 1989-05-04
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[firstpage_image] =>[orig_patent_app_number] => 347542
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/347542 | Receiver and level converter circuit with dual feedback | May 3, 1989 | Issued |
Array
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[id] => 2582947
[patent_doc_number] => 04973860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Circuit for synchronizing an asynchronous input signal to a high frequency clock'
[patent_app_type] => 1
[patent_app_number] => 7/346076
[patent_app_country] => US
[patent_app_date] => 1989-05-02
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[firstpage_image] =>[orig_patent_app_number] => 346076
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/346076 | Circuit for synchronizing an asynchronous input signal to a high frequency clock | May 1, 1989 | Issued |
Array
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[id] => 2493573
[patent_doc_number] => 04868513
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-19
[patent_title] => 'Phase-locked loop with redundant reference input'
[patent_app_type] => 1
[patent_app_number] => 7/344413
[patent_app_country] => US
[patent_app_date] => 1989-04-25
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[firstpage_image] =>[orig_patent_app_number] => 344413
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/344413 | Phase-locked loop with redundant reference input | Apr 24, 1989 | Issued |
Array
(
[id] => 2703058
[patent_doc_number] => 04988901
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-29
[patent_title] => 'Pulse detecting device for detecting and outputting a pulse signal related to the slower frequency input pulse'
[patent_app_type] => 1
[patent_app_number] => 7/338278
[patent_app_country] => US
[patent_app_date] => 1989-04-14
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[firstpage_image] =>[orig_patent_app_number] => 338278
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/338278 | Pulse detecting device for detecting and outputting a pulse signal related to the slower frequency input pulse | Apr 13, 1989 | Issued |
| 07/331950 | INTEGRATED CIRCUIT FOR HIGH SIDE DRIVING OF AN INDUCTIVE LOAD | Apr 2, 1989 | Abandoned |
| 07/332861 | INTEGRATED CIRCUIT | Apr 2, 1989 | Abandoned |
Array
(
[id] => 2771230
[patent_doc_number] => 05036221
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-30
[patent_title] => 'Circuit for eliminating metastable events associated with a data signal asynchronous to a clock signal'
[patent_app_type] => 1
[patent_app_number] => 7/331477
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/331477 | Circuit for eliminating metastable events associated with a data signal asynchronous to a clock signal | Mar 30, 1989 | Issued |
| 07/339384 | HIGH-SPEED ELECTRONIC CIRCUIT HAVING A CASCODE CONFIGURATION | Mar 27, 1989 | Abandoned |
Array
(
[id] => 2710845
[patent_doc_number] => 05001372
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-19
[patent_title] => 'Circuitry for making a differential output single-ended'
[patent_app_type] => 1
[patent_app_number] => 7/328436
[patent_app_country] => US
[patent_app_date] => 1989-03-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/001/05001372.pdf
[firstpage_image] =>[orig_patent_app_number] => 328436
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/328436 | Circuitry for making a differential output single-ended | Mar 23, 1989 | Issued |
| 07/327646 | DIGITAL INTEGRATED CIRCUIT | Mar 22, 1989 | Abandoned |
Array
(
[id] => 2591365
[patent_doc_number] => 04963764
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-16
[patent_title] => 'Low noise current mirror active load circuit'
[patent_app_type] => 1
[patent_app_number] => 7/330953
[patent_app_country] => US
[patent_app_date] => 1989-03-23
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[firstpage_image] =>[orig_patent_app_number] => 330953
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/330953 | Low noise current mirror active load circuit | Mar 22, 1989 | Issued |
Array
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[id] => 2659759
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[patent_kind] => NA
[patent_issue_date] => 1990-11-20
[patent_title] => 'Binary-to-ternary converter for combining two binary signals'
[patent_app_type] => 1
[patent_app_number] => 7/326184
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[patent_app_date] => 1989-03-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/326184 | Binary-to-ternary converter for combining two binary signals | Mar 16, 1989 | Issued |
Array
(
[id] => 2772489
[patent_doc_number] => 05036289
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-30
[patent_title] => 'Method and apparatus for synchronously demodulating detector output of a radiometer'
[patent_app_type] => 1
[patent_app_number] => 7/326808
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[patent_app_date] => 1989-03-17
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[firstpage_image] =>[orig_patent_app_number] => 326808
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/326808 | Method and apparatus for synchronously demodulating detector output of a radiometer | Mar 16, 1989 | Issued |
Array
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[patent_issue_date] => 1990-08-07
[patent_title] => 'High speed complimentary output stage utilizing current steering transistors and a single current source'
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[patent_app_number] => 7/325402
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[patent_app_date] => 1989-03-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/325402 | High speed complimentary output stage utilizing current steering transistors and a single current source | Mar 16, 1989 | Issued |
Array
(
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[patent_kind] => NA
[patent_issue_date] => 1990-09-04
[patent_title] => 'Stabilized generator for supplying a threshold voltage to a MOS transistor'
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Array
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[patent_issue_date] => 1991-12-31
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[firstpage_image] =>[orig_patent_app_number] => 319883
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/319883 | Digital timing signal generator and voltage regulation circuit | Mar 2, 1989 | Issued |
Array
(
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[patent_kind] => NA
[patent_issue_date] => 1990-05-01
[patent_title] => 'Filter circuit for generating a VCO control voltage responsive to the output signals from a frequency/phase discriminator'
[patent_app_type] => 1
[patent_app_number] => 7/312263
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/312263 | Filter circuit for generating a VCO control voltage responsive to the output signals from a frequency/phase discriminator | Feb 20, 1989 | Issued |
Array
(
[id] => 2594910
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[patent_issue_date] => 1990-09-25
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[patent_app_date] => 1989-02-16
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[firstpage_image] =>[orig_patent_app_number] => 311216
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/311216 | Differential charge pump for a phase locked loop | Feb 15, 1989 | Issued |
Array
(
[id] => 2763463
[patent_doc_number] => 05059837
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-22
[patent_title] => 'Data dependent variable time delay circuit'
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[patent_app_number] => 7/309530
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[patent_app_date] => 1989-02-13
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[firstpage_image] =>[orig_patent_app_number] => 309530
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/309530 | Data dependent variable time delay circuit | Feb 12, 1989 | Issued |