Search

Timothy P. Callahan

Director (ID: 5413, Phone: (571)272-4066 , Office: P/2400 )

Most Active Art Unit
2504
Art Unit(s)
2899, 2504, 2816
Total Applications
793
Issued Applications
652
Pending Applications
7
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2660648 [patent_doc_number] => 04929849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-29 [patent_title] => 'Noise suppression in recovery of clock from NRZ data' [patent_app_type] => 1 [patent_app_number] => 7/283148 [patent_app_country] => US [patent_app_date] => 1988-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4107 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/929/04929849.pdf [firstpage_image] =>[orig_patent_app_number] => 283148 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/283148
Noise suppression in recovery of clock from NRZ data Dec 8, 1988 Issued
Array ( [id] => 2568200 [patent_doc_number] => 04849702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-18 [patent_title] => 'Test period generator for automatic test equipment' [patent_app_type] => 1 [patent_app_number] => 7/282830 [patent_app_country] => US [patent_app_date] => 1988-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8281 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/849/04849702.pdf [firstpage_image] =>[orig_patent_app_number] => 282830 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/282830
Test period generator for automatic test equipment Dec 7, 1988 Issued
Array ( [id] => 2527751 [patent_doc_number] => 04883993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-28 [patent_title] => 'Antibounce circuit for digital circuits' [patent_app_type] => 1 [patent_app_number] => 7/279036 [patent_app_country] => US [patent_app_date] => 1988-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1669 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/883/04883993.pdf [firstpage_image] =>[orig_patent_app_number] => 279036 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/279036
Antibounce circuit for digital circuits Dec 1, 1988 Issued
Array ( [id] => 2574019 [patent_doc_number] => 04901026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-13 [patent_title] => 'Phase detector circuit having latched output characteristic' [patent_app_type] => 1 [patent_app_number] => 7/275803 [patent_app_country] => US [patent_app_date] => 1988-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 2934 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/901/04901026.pdf [firstpage_image] =>[orig_patent_app_number] => 275803 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/275803
Phase detector circuit having latched output characteristic Nov 22, 1988 Issued
Array ( [id] => 2639641 [patent_doc_number] => 04893088 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-09 [patent_title] => 'Transimpedance focal plane processor' [patent_app_type] => 1 [patent_app_number] => 7/271656 [patent_app_country] => US [patent_app_date] => 1988-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2227 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/893/04893088.pdf [firstpage_image] =>[orig_patent_app_number] => 271656 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/271656
Transimpedance focal plane processor Nov 15, 1988 Issued
Array ( [id] => 2637977 [patent_doc_number] => 04952822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-28 [patent_title] => 'Integrated logic circuit with instability damping' [patent_app_type] => 1 [patent_app_number] => 7/270155 [patent_app_country] => US [patent_app_date] => 1988-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1348 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/952/04952822.pdf [firstpage_image] =>[orig_patent_app_number] => 270155 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/270155
Integrated logic circuit with instability damping Nov 9, 1988 Issued
Array ( [id] => 2607192 [patent_doc_number] => 04948995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-14 [patent_title] => 'Disenabling circuit for power-on event' [patent_app_type] => 1 [patent_app_number] => 7/267817 [patent_app_country] => US [patent_app_date] => 1988-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2662 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/948/04948995.pdf [firstpage_image] =>[orig_patent_app_number] => 267817 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/267817
Disenabling circuit for power-on event Nov 6, 1988 Issued
07/264429 DEGLITCHED DIGITAL MIXER Oct 30, 1988 Abandoned
Array ( [id] => 2673048 [patent_doc_number] => 04999522 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-12 [patent_title] => 'Active RC filter circuit for use as a band-stop filter' [patent_app_type] => 1 [patent_app_number] => 7/262563 [patent_app_country] => US [patent_app_date] => 1988-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6733 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/999/04999522.pdf [firstpage_image] =>[orig_patent_app_number] => 262563 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/262563
Active RC filter circuit for use as a band-stop filter Oct 23, 1988 Issued
Array ( [id] => 2606365 [patent_doc_number] => 04912340 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-27 [patent_title] => 'Circuit for generating non-overlapping two-phase clocks' [patent_app_type] => 1 [patent_app_number] => 7/260942 [patent_app_country] => US [patent_app_date] => 1988-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3224 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/912/04912340.pdf [firstpage_image] =>[orig_patent_app_number] => 260942 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/260942
Circuit for generating non-overlapping two-phase clocks Oct 20, 1988 Issued
Array ( [id] => 2713807 [patent_doc_number] => 05017802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Base current regulation circuit for a switching transistor, in particular a bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 7/261046 [patent_app_country] => US [patent_app_date] => 1988-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2877 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017802.pdf [firstpage_image] =>[orig_patent_app_number] => 261046 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/261046
Base current regulation circuit for a switching transistor, in particular a bipolar transistor Oct 20, 1988 Issued
Array ( [id] => 2530416 [patent_doc_number] => 04888499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-19 [patent_title] => 'Three input exclusive OR-NOR gate circuit' [patent_app_type] => 1 [patent_app_number] => 7/259942 [patent_app_country] => US [patent_app_date] => 1988-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2375 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/888/04888499.pdf [firstpage_image] =>[orig_patent_app_number] => 259942 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/259942
Three input exclusive OR-NOR gate circuit Oct 18, 1988 Issued
Array ( [id] => 2596845 [patent_doc_number] => 04926451 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-15 [patent_title] => 'Timing controller for high-speed digital integrated circuit' [patent_app_type] => 1 [patent_app_number] => 7/259905 [patent_app_country] => US [patent_app_date] => 1988-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3063 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/926/04926451.pdf [firstpage_image] =>[orig_patent_app_number] => 259905 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/259905
Timing controller for high-speed digital integrated circuit Oct 18, 1988 Issued
Array ( [id] => 2633013 [patent_doc_number] => 04906941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-06 [patent_title] => 'Digital phase locked loop circuit' [patent_app_type] => 1 [patent_app_number] => 7/259902 [patent_app_country] => US [patent_app_date] => 1988-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 8878 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/906/04906941.pdf [firstpage_image] =>[orig_patent_app_number] => 259902 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/259902
Digital phase locked loop circuit Oct 18, 1988 Issued
Array ( [id] => 2673029 [patent_doc_number] => 04999521 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-12 [patent_title] => 'CMOS analog multiplying circuit' [patent_app_type] => 1 [patent_app_number] => 7/272678 [patent_app_country] => US [patent_app_date] => 1988-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1782 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/999/04999521.pdf [firstpage_image] =>[orig_patent_app_number] => 272678 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/272678
CMOS analog multiplying circuit Oct 16, 1988 Issued
07/258933 GALLIUM ARSENIDE ANTENNA SWITCH HAVING VOLTAGE MULTIPLIER BIAS CIRCUIT Oct 16, 1988 Abandoned
Array ( [id] => 2596570 [patent_doc_number] => 04918337 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-17 [patent_title] => 'Active RC filter having band-rejection and all-pass modes' [patent_app_type] => 1 [patent_app_number] => 7/257361 [patent_app_country] => US [patent_app_date] => 1988-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4115 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/918/04918337.pdf [firstpage_image] =>[orig_patent_app_number] => 257361 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/257361
Active RC filter having band-rejection and all-pass modes Oct 11, 1988 Issued
07/255224 BIASING CIRCUIT WITH INCREASED CAPACITY FOR HIGH LOAD CONDITIONS Oct 10, 1988 Abandoned
Array ( [id] => 2599996 [patent_doc_number] => 04975593 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-04 [patent_title] => 'Microcomputer with synchronized data transfer' [patent_app_type] => 1 [patent_app_number] => 7/255255 [patent_app_country] => US [patent_app_date] => 1988-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2722 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/975/04975593.pdf [firstpage_image] =>[orig_patent_app_number] => 255255 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/255255
Microcomputer with synchronized data transfer Oct 10, 1988 Issued
07/254431 SIGNAL TRANSMISSION CIRCUIT Oct 5, 1988 Abandoned
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