
Timothy P. Callahan
Director (ID: 14944, Phone: (571)272-4066 , Office: P/2400 )
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2504, 2816, 2899 |
| Total Applications | 793 |
| Issued Applications | 652 |
| Pending Applications | 7 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2846813
[patent_doc_number] => 05138188
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-11
[patent_title] => 'Edge-sensitive pulse generator'
[patent_app_type] => 1
[patent_app_number] => 7/727655
[patent_app_country] => US
[patent_app_date] => 1991-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 3246
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/138/05138188.pdf
[firstpage_image] =>[orig_patent_app_number] => 727655
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/727655 | Edge-sensitive pulse generator | Jul 8, 1991 | Issued |
Array
(
[id] => 2950562
[patent_doc_number] => 05254955
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-19
[patent_title] => 'Advanced phase locked loop circuit'
[patent_app_type] => 1
[patent_app_number] => 7/727840
[patent_app_country] => US
[patent_app_date] => 1991-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 43
[patent_no_of_words] => 17142
[patent_no_of_claims] => 11
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[patent_words_short_claim] => 186
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/254/05254955.pdf
[firstpage_image] =>[orig_patent_app_number] => 727840
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/727840 | Advanced phase locked loop circuit | Jul 8, 1991 | Issued |
Array
(
[id] => 3061908
[patent_doc_number] => 05307317
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-26
[patent_title] => 'Semiconductor memory device having improved access to addresses'
[patent_app_type] => 1
[patent_app_number] => 7/726379
[patent_app_country] => US
[patent_app_date] => 1991-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3879
[patent_no_of_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/307/05307317.pdf
[firstpage_image] =>[orig_patent_app_number] => 726379
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/726379 | Semiconductor memory device having improved access to addresses | Jul 4, 1991 | Issued |
Array
(
[id] => 2939459
[patent_doc_number] => 05229664
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-20
[patent_title] => 'Programmable differentiator delay'
[patent_app_type] => 1
[patent_app_number] => 7/725864
[patent_app_country] => US
[patent_app_date] => 1991-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1917
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/229/05229664.pdf
[firstpage_image] =>[orig_patent_app_number] => 725864
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/725864 | Programmable differentiator delay | Jul 2, 1991 | Issued |
Array
(
[id] => 3055646
[patent_doc_number] => 05287317
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-15
[patent_title] => 'Non-volatile semiconductor memory device with over-erasing prevention'
[patent_app_type] => 1
[patent_app_number] => 7/721773
[patent_app_country] => US
[patent_app_date] => 1991-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 4688
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/287/05287317.pdf
[firstpage_image] =>[orig_patent_app_number] => 721773
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/721773 | Non-volatile semiconductor memory device with over-erasing prevention | Jun 27, 1991 | Issued |
Array
(
[id] => 3102029
[patent_doc_number] => 05313343
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'Magnetic recording or reproducing apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/720749
[patent_app_country] => US
[patent_app_date] => 1991-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 6801
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[pdf_file] => patents/05/313/05313343.pdf
[firstpage_image] =>[orig_patent_app_number] => 720749
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/720749 | Magnetic recording or reproducing apparatus | Jun 24, 1991 | Issued |
Array
(
[id] => 2920401
[patent_doc_number] => 05179294
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-01-12
[patent_title] => 'Process independent digital clock signal shaping network'
[patent_app_type] => 1
[patent_app_number] => 7/720079
[patent_app_country] => US
[patent_app_date] => 1991-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5200
[patent_no_of_claims] => 15
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[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/179/05179294.pdf
[firstpage_image] =>[orig_patent_app_number] => 720079
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/720079 | Process independent digital clock signal shaping network | Jun 23, 1991 | Issued |
Array
(
[id] => 2938120
[patent_doc_number] => 05220201
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-15
[patent_title] => 'Phase-locked signal generator'
[patent_app_type] => 1
[patent_app_number] => 7/718254
[patent_app_country] => US
[patent_app_date] => 1991-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 44
[patent_no_of_words] => 11333
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/220/05220201.pdf
[firstpage_image] =>[orig_patent_app_number] => 718254
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/718254 | Phase-locked signal generator | Jun 19, 1991 | Issued |
| 07/717440 | EDGE INTEGRATING PHASE DETECTOR | Jun 18, 1991 | Abandoned |
| 07/717004 | REGULATED DELAY LINE | Jun 17, 1991 | Abandoned |
Array
(
[id] => 2923436
[patent_doc_number] => 05206548
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-27
[patent_title] => 'Noise reduction circuit'
[patent_app_type] => 1
[patent_app_number] => 7/716775
[patent_app_country] => US
[patent_app_date] => 1991-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/206/05206548.pdf
[firstpage_image] =>[orig_patent_app_number] => 716775
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/716775 | Noise reduction circuit | Jun 17, 1991 | Issued |
Array
(
[id] => 2955964
[patent_doc_number] => 05255240
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-19
[patent_title] => 'One stage word line decoder/driver with speed-up Darlington drive and adjustable pull down'
[patent_app_type] => 1
[patent_app_number] => 7/714442
[patent_app_country] => US
[patent_app_date] => 1991-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4135
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/255/05255240.pdf
[firstpage_image] =>[orig_patent_app_number] => 714442
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/714442 | One stage word line decoder/driver with speed-up Darlington drive and adjustable pull down | Jun 12, 1991 | Issued |
Array
(
[id] => 3086691
[patent_doc_number] => 05297096
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-22
[patent_title] => 'Nonvolatile semiconductor memory device and data erasing method thereof'
[patent_app_type] => 1
[patent_app_number] => 7/711547
[patent_app_country] => US
[patent_app_date] => 1991-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
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[pdf_file] => patents/05/297/05297096.pdf
[firstpage_image] =>[orig_patent_app_number] => 711547
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/711547 | Nonvolatile semiconductor memory device and data erasing method thereof | Jun 6, 1991 | Issued |
Array
(
[id] => 2844951
[patent_doc_number] => 05172010
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-15
[patent_title] => 'Clock chopper/stretcher for high end machines'
[patent_app_type] => 1
[patent_app_number] => 7/712270
[patent_app_country] => US
[patent_app_date] => 1991-06-07
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/172/05172010.pdf
[firstpage_image] =>[orig_patent_app_number] => 712270
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/712270 | Clock chopper/stretcher for high end machines | Jun 6, 1991 | Issued |
Array
(
[id] => 2953977
[patent_doc_number] => 05255136
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-19
[patent_title] => 'High capacity submicro-winchester fixed disk drive'
[patent_app_type] => 1
[patent_app_number] => 7/710171
[patent_app_country] => US
[patent_app_date] => 1991-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 20
[patent_no_of_words] => 19333
[patent_no_of_claims] => 30
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/255/05255136.pdf
[firstpage_image] =>[orig_patent_app_number] => 710171
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/710171 | High capacity submicro-winchester fixed disk drive | Jun 3, 1991 | Issued |
| 07/710246 | OUTPUT DRIVER FOR REDUCING TRANSIENT NOISE IN INTEGRATED CIRCUITS | Jun 2, 1991 | Abandoned |
Array
(
[id] => 2964360
[patent_doc_number] => 05198710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-30
[patent_title] => 'Bi-directional digital noise glitch filter'
[patent_app_type] => 1
[patent_app_number] => 7/707517
[patent_app_country] => US
[patent_app_date] => 1991-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 3197
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/198/05198710.pdf
[firstpage_image] =>[orig_patent_app_number] => 707517
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/707517 | Bi-directional digital noise glitch filter | May 29, 1991 | Issued |
Array
(
[id] => 3055625
[patent_doc_number] => 05287316
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-15
[patent_title] => 'Optical FIFO buffer'
[patent_app_type] => 1
[patent_app_number] => 7/705387
[patent_app_country] => US
[patent_app_date] => 1991-05-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/287/05287316.pdf
[firstpage_image] =>[orig_patent_app_number] => 705387
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/705387 | Optical FIFO buffer | May 23, 1991 | Issued |
Array
(
[id] => 2883361
[patent_doc_number] => 05119037
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-02
[patent_title] => 'High speed phase-lock loop device'
[patent_app_type] => 1
[patent_app_number] => 7/704531
[patent_app_country] => US
[patent_app_date] => 1991-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/119/05119037.pdf
[firstpage_image] =>[orig_patent_app_number] => 704531
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/704531 | High speed phase-lock loop device | May 22, 1991 | Issued |
Array
(
[id] => 2985437
[patent_doc_number] => 05204631
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-20
[patent_title] => 'System and method for automatic thresholding of signals in the presence of Gaussian noise'
[patent_app_type] => 1
[patent_app_number] => 7/703072
[patent_app_country] => US
[patent_app_date] => 1991-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/204/05204631.pdf
[firstpage_image] =>[orig_patent_app_number] => 703072
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/703072 | System and method for automatic thresholding of signals in the presence of Gaussian noise | May 19, 1991 | Issued |