Search

Titus Wong

Examiner (ID: 19525)

Most Active Art Unit
2184
Art Unit(s)
2181, 2185, 2184
Total Applications
695
Issued Applications
511
Pending Applications
51
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20009690 [patent_doc_number] => 20250147912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => ELECTRONIC DEVICE, FAST CHARGING METHOD, APPARATUS, SYSTEM, AND READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 19/014206 [patent_app_country] => US [patent_app_date] => 2025-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19014206 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/014206
ELECTRONIC DEVICE, FAST CHARGING METHOD, APPARATUS, SYSTEM, AND READABLE STORAGE MEDIUM Jan 7, 2025 Pending
Array ( [id] => 20123362 [patent_doc_number] => 20250238393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => RESPONDER SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM, COMMANDER SUBSCRIBER STATION FOR THE SERIAL BUS SYSTEM, AND METHOD FOR COMMUNICATION IN A SERIAL BUS SYSTEM [patent_app_type] => utility [patent_app_number] => 18/985172 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985172 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985172
RESPONDER SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM, COMMANDER SUBSCRIBER STATION FOR THE SERIAL BUS SYSTEM, AND METHOD FOR COMMUNICATION IN A SERIAL BUS SYSTEM Dec 17, 2024 Pending
Array ( [id] => 20070804 [patent_doc_number] => 20250209026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 18/976477 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18976477 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/976477
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING Dec 10, 2024 Pending
Array ( [id] => 19849021 [patent_doc_number] => 20250094372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => COMPUTING SYSTEM FOR DETERMINING RESOURCE TO PERFORM OPERATION ON DATA AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/963498 [patent_app_country] => US [patent_app_date] => 2024-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18963498 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/963498
COMPUTING SYSTEM FOR DETERMINING RESOURCE TO PERFORM OPERATION ON DATA AND OPERATING METHOD THEREOF Nov 27, 2024 Pending
Array ( [id] => 20388226 [patent_doc_number] => 12487952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Method and system for shifting data within memory [patent_app_type] => utility [patent_app_number] => 18/936668 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7247 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936668 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936668
Method and system for shifting data within memory Nov 3, 2024 Issued
Array ( [id] => 20000803 [patent_doc_number] => 20250139025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => REMOTE COMPUTING APPARATUS AND DATA STORAGE SYSTEM COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 18/931916 [patent_app_country] => US [patent_app_date] => 2024-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18931916 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/931916
REMOTE COMPUTING APPARATUS AND DATA STORAGE SYSTEM COMPRISING THE SAME Oct 29, 2024 Pending
Array ( [id] => 20000814 [patent_doc_number] => 20250139036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => DAISY CHAIN COMMUNICATION SYSTEM AND METHOD, BATTERY MANAGEMENT SYSTEM [patent_app_type] => utility [patent_app_number] => 18/930797 [patent_app_country] => US [patent_app_date] => 2024-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18930797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/930797
DAISY CHAIN COMMUNICATION SYSTEM AND METHOD, BATTERY MANAGEMENT SYSTEM Oct 28, 2024 Pending
Array ( [id] => 19686109 [patent_doc_number] => 20250004654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => Transitioning Between Using Write Commands And Read Commands For Data Transfer Between Distributed Storage Systems [patent_app_type] => utility [patent_app_number] => 18/828855 [patent_app_country] => US [patent_app_date] => 2024-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18828855 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/828855
Transitioning Between Using Write Commands And Read Commands For Data Transfer Between Distributed Storage Systems Sep 8, 2024 Pending
Array ( [id] => 19802652 [patent_doc_number] => 20250068577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SWITCH, MEMORY SHARING METHOD, SYSTEM, COMPUTING DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/812672 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812672 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/812672
SWITCH, MEMORY SHARING METHOD, SYSTEM, COMPUTING DEVICE, AND STORAGE MEDIUM Aug 21, 2024 Pending
Array ( [id] => 20513361 [patent_doc_number] => 20260037462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => PROCESSING DATA USING ACCELERATORS WITH MULTI-FRAME SUPPORT [patent_app_type] => utility [patent_app_number] => 18/789941 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 50695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789941 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789941
PROCESSING DATA USING ACCELERATORS WITH MULTI-FRAME SUPPORT Jul 30, 2024 Pending
Array ( [id] => 20513360 [patent_doc_number] => 20260037461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => SYSTEMS AND METHODS FOR PROCESSING DATA BASED AT LEAST ON RANDOM REGIONS IN A FRAME [patent_app_type] => utility [patent_app_number] => 18/789928 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 50687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789928 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789928
SYSTEMS AND METHODS FOR PROCESSING DATA BASED AT LEAST ON RANDOM REGIONS IN A FRAME Jul 30, 2024 Pending
Array ( [id] => 20494248 [patent_doc_number] => 12536118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Tiled in-memory computing architecture [patent_app_type] => utility [patent_app_number] => 18/789480 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 11417 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789480
Tiled in-memory computing architecture Jul 29, 2024 Issued
Array ( [id] => 20487502 [patent_doc_number] => 20260023701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => NETWORK COMMUNICATION APPARATUS WITH MUTIPLE HOST BUS INTERFACES [patent_app_type] => utility [patent_app_number] => 18/776541 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776541 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/776541
NETWORK COMMUNICATION APPARATUS WITH MUTIPLE HOST BUS INTERFACES Jul 17, 2024 Pending
Array ( [id] => 20101963 [patent_doc_number] => 20250231899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/774957 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774957 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774957
MEMORY DEVICE Jul 16, 2024 Pending
Array ( [id] => 19992740 [patent_doc_number] => 20250130962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => Peer-to-Peer Interfaced Supplemental Computing Nodes [patent_app_type] => utility [patent_app_number] => 18/680419 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680419 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680419
Peer-to-Peer Interfaced Supplemental Computing Nodes May 30, 2024 Pending
Array ( [id] => 20395476 [patent_doc_number] => 20250370951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => CONFIGURING AND DEBUGGING A DIE-TO-DIE LINK USING A SIDEBAND LINK [patent_app_type] => utility [patent_app_number] => 18/675643 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675643 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/675643
CONFIGURING AND DEBUGGING A DIE-TO-DIE LINK USING A SIDEBAND LINK May 27, 2024 Pending
Array ( [id] => 20635793 [patent_doc_number] => 12596667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Multi-chip module including integrated circuit with receiver circuitry implementing transmit signal cancellation [patent_app_type] => utility [patent_app_number] => 18/662627 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 2180 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662627 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662627
Multi-chip module including integrated circuit with receiver circuitry implementing transmit signal cancellation May 12, 2024 Issued
Array ( [id] => 19466504 [patent_doc_number] => 20240320174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => DIRECT MEMORY ACCESS CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/612725 [patent_app_country] => US [patent_app_date] => 2024-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18612725 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/612725
DIRECT MEMORY ACCESS CONTROLLER Mar 20, 2024 Pending
Array ( [id] => 19466503 [patent_doc_number] => 20240320173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => STORAGE DEVICE PROVIDING DIRECT MEMORY ACCESS, COMPUTING SYSTEM INCLUDING THE SAME, AND OPERATING METHOD OF THE STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/610528 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610528 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610528
STORAGE DEVICE PROVIDING DIRECT MEMORY ACCESS, COMPUTING SYSTEM INCLUDING THE SAME, AND OPERATING METHOD OF THE STORAGE DEVICE Mar 19, 2024 Pending
Array ( [id] => 20208656 [patent_doc_number] => 20250278376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => EXAMINING CPU INTERCONNECT BUSES IN A MULTIPROCESSOR SYSTEM [patent_app_type] => utility [patent_app_number] => 18/593199 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593199 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593199
EXAMINING CPU INTERCONNECT BUSES IN A MULTIPROCESSOR SYSTEM Feb 29, 2024 Pending
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