
Titus Wong
Examiner (ID: 19525)
| Most Active Art Unit | 2184 |
| Art Unit(s) | 2181, 2185, 2184 |
| Total Applications | 695 |
| Issued Applications | 511 |
| Pending Applications | 51 |
| Abandoned Applications | 146 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13817815
[patent_doc_number] => 10185676
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-22
[patent_title] => Direct memory access controller and system for accessing channel buffer
[patent_app_type] => utility
[patent_app_number] => 14/619783
[patent_app_country] => US
[patent_app_date] => 2015-02-11
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Array
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[patent_kind] => B2
[patent_issue_date] => 2021-09-14
[patent_title] => Adapter to concatenate connectors
[patent_app_type] => utility
[patent_app_number] => 15/521760
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/521760 | Adapter to concatenate connectors | Jan 5, 2015 | Issued |
Array
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[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'MEMORY SYSTEM HAVING HIGH DATA TRANSFER EFFICIENCY AND HOST CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 14/588718
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/588718 | Memory system having high data transfer efficiency and host controller | Jan 1, 2015 | Issued |
Array
(
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[patent_doc_number] => 20170212861
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[patent_kind] => A1
[patent_issue_date] => 2017-07-27
[patent_title] => 'CLOCK TREE IMPLEMENTATION METHOD, SYSTEM-ON-CHIP AND COMPUTER STORAGE MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 15/328219
[patent_app_country] => US
[patent_app_date] => 2014-12-25
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Array
(
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[patent_title] => 'Communication Device Ingress Information Management System and Method'
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Array
(
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[patent_issue_date] => 2015-06-18
[patent_title] => 'ELECTRICAL APPARATUS, CONTROL DEVICE AND COMMUNICATION METHOD'
[patent_app_type] => utility
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Array
(
[id] => 10816269
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[patent_title] => 'ELECTRONIC DEVICE WITH MULTIPLE INTERFACES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/559926 | ELECTRONIC DEVICE WITH MULTIPLE INTERFACES | Dec 3, 2014 | Abandoned |
Array
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[id] => 10808599
[patent_doc_number] => 20160154756
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[patent_issue_date] => 2016-06-02
[patent_title] => 'UNORDERED MULTI-PATH ROUTING IN A PCIE EXPRESS FABRIC ENVIRONMENT'
[patent_app_type] => utility
[patent_app_number] => 14/558404
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[patent_app_date] => 2014-12-02
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/558404 | UNORDERED MULTI-PATH ROUTING IN A PCIE EXPRESS FABRIC ENVIRONMENT | Dec 1, 2014 | Abandoned |
Array
(
[id] => 10665741
[patent_doc_number] => 20160011885
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[patent_issue_date] => 2016-01-14
[patent_title] => 'USB HUB'
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Array
(
[id] => 12256050
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[patent_title] => 'Distributed timer subsystem'
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Array
(
[id] => 10793903
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[patent_issue_date] => 2016-05-19
[patent_title] => 'MANAGING BUFFERED COMMUNICATION BETWEEN SOCKETS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/541902 | Managing buffered communication between sockets | Nov 13, 2014 | Issued |
Array
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Array
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Array
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Array
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Array
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Array
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