Titus Wong

Array ( [id] => 9907964 [patent_doc_number] => 20150063165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'DATA SHARING SYSTEM BETWEEN MASTER INVERTER AND SLAVE INVERTER' [patent_app_type] => utility [patent_app_number] => 14/461729 [patent_app_country] => US [patent_app_date] => 2014-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5054 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14461729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9838255 [patent_doc_number] => 20150030336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-29 [patent_title] => 'OPTICAL TRANSCEIVER' [patent_app_type] => utility [patent_app_number] => 14/444538 [patent_app_country] => US [patent_app_date] => 2014-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6723 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14444538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10934521 [patent_doc_number] => 20140337542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'MEMORY SYSTEM HAVING HIGH DATA TRANSFER EFFICIENCY AND HOST CONTROLLER' [patent_app_type] => utility [patent_app_number] => 14/338038 [patent_app_country] => US [patent_app_date] => 2014-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3894 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10922110 [patent_doc_number] => 20140325130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'STATUS INFORMATION SAVING AMONG MULTIPLE COMPUTERS' [patent_app_type] => utility [patent_app_number] => 14/328217 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5578 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10478326 [patent_doc_number] => 20150363343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'AUTO-CONFIGURATION OF A PORT' [patent_app_type] => utility [patent_app_number] => 14/307352 [patent_app_country] => US [patent_app_date] => 2014-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14307352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12213994 [patent_doc_number] => 09910803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Multi master arbitration scheme in a system on chip' [patent_app_type] => utility [patent_app_number] => 14/306970 [patent_app_country] => US [patent_app_date] => 2014-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2783 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14306970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12475209 [patent_doc_number] => 09990321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-05 [patent_title] => Selectively connecting a port of an electrical device to components in the electrical device [patent_app_type] => utility [patent_app_number] => 14/306366 [patent_app_country] => US [patent_app_date] => 2014-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7502 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14306366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10913522 [patent_doc_number] => 20140316541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-23 [patent_title] => 'Intelligent Building Automation Node' [patent_app_type] => utility [patent_app_number] => 14/300718 [patent_app_country] => US [patent_app_date] => 2014-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2501 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14300718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9745341 [patent_doc_number] => 20140281060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'LOW-CONTENTION UPDATE BUFFER QUEUING FOR LARGE SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/289847 [patent_app_country] => US [patent_app_date] => 2014-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7915 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14289847 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10157655 [patent_doc_number] => 09189434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Universal serial bus device and method for controlling an idle-delay time thereof' [patent_app_type] => utility [patent_app_number] => 14/286100 [patent_app_country] => US [patent_app_date] => 2014-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6123 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14286100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9807739 [patent_doc_number] => 20150019684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'AUTOMATIC ATTACHMENT AND DETACHMENT FOR HUB AND PERIPHERAL DEVICES' [patent_app_type] => utility [patent_app_number] => 14/281128 [patent_app_country] => US [patent_app_date] => 2014-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7721 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14281128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10296647 [patent_doc_number] => 20150181646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'METHOD AND SYSTEM FOR BRIDGING AN INPUT SIGNAL FROM A HUMAN INTERFACE DEVICE BETWEEN A COMPUTER AND A MOBILE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/262020 [patent_app_country] => US [patent_app_date] => 2014-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3912 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14262020 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10408163 [patent_doc_number] => 20150293172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'Method and Apparatus for Connecting Debug Interface to Processing Circuits Without Sideband Interface' [patent_app_type] => utility [patent_app_number] => 14/253150 [patent_app_country] => US [patent_app_date] => 2014-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14253150 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9637055 [patent_doc_number] => 20140215164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'Multiport Memory Architecture' [patent_app_type] => utility [patent_app_number] => 14/230555 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11486 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10392797 [patent_doc_number] => 20150277804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'SAN IP Validation Tool' [patent_app_type] => utility [patent_app_number] => 14/228608 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7843 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10393047 [patent_doc_number] => 20150278055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'PLUGGABLE COMPONENT TRACKING PROGRAM' [patent_app_type] => utility [patent_app_number] => 14/228497 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10393122 [patent_doc_number] => 20150278129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'INTER-ADAPTER COOPERATION FOR MULTIPATH INPUT/OUTPUT SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/226949 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8002 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14226949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10392771 [patent_doc_number] => 20150277778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'VIRTUAL GENERAL-PURPOSE I/O CONTROLLER' [patent_app_type] => utility [patent_app_number] => 14/227735 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10900 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14227735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10177909 [patent_doc_number] => 09208115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Processor with tightly coupled smart memory unit' [patent_app_type] => utility [patent_app_number] => 14/220735 [patent_app_country] => US [patent_app_date] => 2014-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14220735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9745501 [patent_doc_number] => 20140281221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'DATA PROCESSING' [patent_app_type] => utility [patent_app_number] => 14/211546 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7196 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14211546 [rel_patent_id] =>[rel_patent_doc_number] =>)