Search

Titus Wong

Examiner (ID: 19525)

Most Active Art Unit
2184
Art Unit(s)
2181, 2185, 2184
Total Applications
695
Issued Applications
511
Pending Applications
51
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12008826 [patent_doc_number] => 09802124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Apparatus and method for cloning and snapshotting in multi-dimensional to linear address space translation' [patent_app_type] => utility [patent_app_number] => 14/091211 [patent_app_country] => US [patent_app_date] => 2013-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12738 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091211 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/091211
Apparatus and method for cloning and snapshotting in multi-dimensional to linear address space translation Nov 25, 2013 Issued
Array ( [id] => 11550553 [patent_doc_number] => 09619402 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-11 [patent_title] => 'Method and apparatus for optimizing translation of a virtual memory address into a physical memory address in a processor having virtual memory' [patent_app_type] => utility [patent_app_number] => 14/091226 [patent_app_country] => US [patent_app_date] => 2013-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4715 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091226 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/091226
Method and apparatus for optimizing translation of a virtual memory address into a physical memory address in a processor having virtual memory Nov 25, 2013 Issued
Array ( [id] => 9372371 [patent_doc_number] => 20140082244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'Enhanced I/O Performance in a Multi-Processor System Via Interrupt Affinity Schemes' [patent_app_type] => utility [patent_app_number] => 14/087953 [patent_app_country] => US [patent_app_date] => 2013-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8407 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14087953 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/087953
Enhanced I/O performance in a multi-processor system via interrupt affinity schemes Nov 21, 2013 Issued
Array ( [id] => 10258020 [patent_doc_number] => 20150143017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'Memory Device Debugging on Host Platforms' [patent_app_type] => utility [patent_app_number] => 14/086531 [patent_app_country] => US [patent_app_date] => 2013-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086531 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/086531
Memory device debugging on host platforms Nov 20, 2013 Issued
Array ( [id] => 9548513 [patent_doc_number] => 20140173161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'MULTIPROCESSOR SYSTEM WITH IMPROVED SECONDARY INTERCONNECTION NETWORK' [patent_app_type] => utility [patent_app_number] => 14/086648 [patent_app_country] => US [patent_app_date] => 2013-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8214 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14086648 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/086648
Multiprocessor system with improved secondary interconnection network Nov 20, 2013 Issued
Array ( [id] => 9486386 [patent_doc_number] => 08732347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Automatic attachment and detachment for hub and peripheral devices' [patent_app_type] => utility [patent_app_number] => 14/081317 [patent_app_country] => US [patent_app_date] => 2013-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7685 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14081317 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/081317
Automatic attachment and detachment for hub and peripheral devices Nov 14, 2013 Issued
Array ( [id] => 10644017 [patent_doc_number] => 09360884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Clocking for pipelined routing' [patent_app_type] => utility [patent_app_number] => 14/075802 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7620 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14075802 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/075802
Clocking for pipelined routing Nov 7, 2013 Issued
Array ( [id] => 14123455 [patent_doc_number] => 10248587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Reduced host data command processing [patent_app_type] => utility [patent_app_number] => 14/075905 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4933 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14075905 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/075905
Reduced host data command processing Nov 7, 2013 Issued
Array ( [id] => 10242883 [patent_doc_number] => 20150127878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'TUNNELED WINDOW CONNECTION FOR PROGRAMMED INPUT OUTPUT TRANSFERS OVER A SWITCH FABRIC' [patent_app_type] => utility [patent_app_number] => 14/073491 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4022 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073491 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/073491
TUNNELED WINDOW CONNECTION FOR PROGRAMMED INPUT OUTPUT TRANSFERS OVER A SWITCH FABRIC Nov 5, 2013 Abandoned
Array ( [id] => 9781177 [patent_doc_number] => 08856398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Process to generate various length parameters in a number of SGLS based upon the length fields of another SGL' [patent_app_type] => utility [patent_app_number] => 14/073016 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2897 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073016 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/073016
Process to generate various length parameters in a number of SGLS based upon the length fields of another SGL Nov 5, 2013 Issued
Array ( [id] => 10242865 [patent_doc_number] => 20150127860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'SETTING A PCIE DEVICE ID' [patent_app_type] => utility [patent_app_number] => 14/070147 [patent_app_country] => US [patent_app_date] => 2013-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14070147 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/070147
Setting a PCIE Device ID Oct 31, 2013 Issued
Array ( [id] => 9308515 [patent_doc_number] => 20140047189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'Optimizing Write and Wear Performance for a Memory' [patent_app_type] => utility [patent_app_number] => 14/058078 [patent_app_country] => US [patent_app_date] => 2013-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14058078 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/058078
Optimizing write and wear performance for a memory Oct 17, 2013 Issued
Array ( [id] => 10582787 [patent_doc_number] => 09304911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Semiconductor storage device and buffer operation method thereof' [patent_app_type] => utility [patent_app_number] => 14/056458 [patent_app_country] => US [patent_app_date] => 2013-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6608 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14056458 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/056458
Semiconductor storage device and buffer operation method thereof Oct 16, 2013 Issued
Array ( [id] => 13017483 [patent_doc_number] => 10031856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Common pointers in unified virtual memory system [patent_app_type] => utility [patent_app_number] => 14/055367 [patent_app_country] => US [patent_app_date] => 2013-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13038 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14055367 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/055367
Common pointers in unified virtual memory system Oct 15, 2013 Issued
Array ( [id] => 13017483 [patent_doc_number] => 10031856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Common pointers in unified virtual memory system [patent_app_type] => utility [patent_app_number] => 14/055367 [patent_app_country] => US [patent_app_date] => 2013-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13038 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14055367 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/055367
Common pointers in unified virtual memory system Oct 15, 2013 Issued
Array ( [id] => 10644270 [patent_doc_number] => 09361138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Peripheral device, method of controlling peripheral device, firmware download system and program' [patent_app_type] => utility [patent_app_number] => 14/409761 [patent_app_country] => US [patent_app_date] => 2013-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 14564 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14409761 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/409761
Peripheral device, method of controlling peripheral device, firmware download system and program Oct 10, 2013 Issued
Array ( [id] => 9423684 [patent_doc_number] => 20140108335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'CLOUD BASED FILE SYSTEM SURPASSING DEVICE STORAGE LIMITS' [patent_app_type] => utility [patent_app_number] => 14/043082 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6864 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043082 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/043082
Cloud based file system surpassing device storage limits Sep 30, 2013 Issued
Array ( [id] => 9386460 [patent_doc_number] => 20140089943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'METHOD, SYSTEM AND APPARATUS FOR HANDLING EVENTS FOR PARTITIONS IN A SOCKET WITH SUB-SOCKET PARTITIONING' [patent_app_type] => utility [patent_app_number] => 14/039309 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4702 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14039309 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/039309
Method, system and apparatus for handling events for partitions in a socket with sub-socket partitioning Sep 26, 2013 Issued
Array ( [id] => 10204133 [patent_doc_number] => 20150089120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-26 [patent_title] => 'REFRESH OF DATA STORED IN A CROSS-POINT NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/038165 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8271 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14038165 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/038165
Refresh of data stored in a cross-point non-volatile memory Sep 25, 2013 Issued
Array ( [id] => 10204128 [patent_doc_number] => 20150089116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-26 [patent_title] => 'Merged TLB Structure For Multiple Sequential Address Translations' [patent_app_type] => utility [patent_app_number] => 14/038156 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11074 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14038156 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/038156
Merged TLB structure for multiple sequential address translations Sep 25, 2013 Issued
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