Search

Titus Wong

Examiner (ID: 8616, Phone: (571)270-1627 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2181, 2184, 2185
Total Applications
703
Issued Applications
514
Pending Applications
54
Abandoned Applications
147

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20035061 [patent_doc_number] => 20250173283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => NVMe Completion And Interrupt [patent_app_type] => utility [patent_app_number] => 18/522514 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522514 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522514
NVMe completion and interrupt Nov 28, 2023 Issued
Array ( [id] => 20035079 [patent_doc_number] => 20250173301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => NETWORK PROCESSING USING FIXED-FUNCTION LOGIC COMPONENTS CLOSE-COUPLED WITH PROGRAMMABLE LOGIC AND SOFTWARE [patent_app_type] => utility [patent_app_number] => 18/523492 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18523492 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/523492
NETWORK PROCESSING USING FIXED-FUNCTION LOGIC COMPONENTS CLOSE-COUPLED WITH PROGRAMMABLE LOGIC AND SOFTWARE Nov 28, 2023 Pending
Array ( [id] => 19036534 [patent_doc_number] => 20240086349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => INPUT/OUTPUT DEVICE OPERATIONAL MODES FOR A SYSTEM WITH MEMORY POOLS [patent_app_type] => utility [patent_app_number] => 18/514872 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514872
Input/output device operational modes for a system with memory pools Nov 19, 2023 Issued
Array ( [id] => 19189981 [patent_doc_number] => 20240168894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => DATA TRANSMISSION DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/504582 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3756 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504582 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504582
Data transmission device with FIFO circuits for reading and writing operations and method Nov 7, 2023 Issued
Array ( [id] => 20790197 [patent_doc_number] => 12664112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Apparatus and method for transferring a cryptographic key over a bus of a system-on-chip [patent_app_type] => utility [patent_app_number] => 18/379111 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18379111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/379111
Apparatus and method for transferring a cryptographic key over a bus of a system-on-chip Oct 10, 2023 Issued
Array ( [id] => 19933569 [patent_doc_number] => 12306773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Multiprocessor system with improved secondary interconnection network [patent_app_type] => utility [patent_app_number] => 18/243943 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243943 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/243943
Multiprocessor system with improved secondary interconnection network Sep 7, 2023 Issued
Array ( [id] => 19506529 [patent_doc_number] => 12117949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Configurable cryptographic processor with integrated DMA interface for secure data handling [patent_app_type] => utility [patent_app_number] => 18/364786 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 14525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364786 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364786
Configurable cryptographic processor with integrated DMA interface for secure data handling Aug 2, 2023 Issued
Array ( [id] => 18790520 [patent_doc_number] => 20230379381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => LOAD BALANCED NETWORK FILE ACCESSES [patent_app_type] => utility [patent_app_number] => 18/359986 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359986 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359986
Load balanced network file accesses Jul 26, 2023 Issued
Array ( [id] => 20687401 [patent_doc_number] => 12617534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Modular seat control system [patent_app_type] => utility [patent_app_number] => 18/360547 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 2307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/360547
Modular seat control system Jul 26, 2023 Issued
Array ( [id] => 20160140 [patent_doc_number] => 12386768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Extending multichip package link off package [patent_app_type] => utility [patent_app_number] => 18/352785 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 14510 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352785 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352785
Extending multichip package link off package Jul 13, 2023 Issued
Array ( [id] => 20731560 [patent_doc_number] => 12638818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => High availability redundant power module with I/O input monitoring [patent_app_type] => utility [patent_app_number] => 18/220112 [patent_app_country] => US [patent_app_date] => 2023-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18220112 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/220112
High availability redundant power module with I/O input monitoring Jul 9, 2023 Issued
Array ( [id] => 20493999 [patent_doc_number] => 12535867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Electronic device and method for controlling heat generation thereof during a call [patent_app_type] => utility [patent_app_number] => 18/347231 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4685 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347231 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/347231
Electronic device and method for controlling heat generation thereof during a call Jul 4, 2023 Issued
Array ( [id] => 19956392 [patent_doc_number] => 12326806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Memory management for multiple process instances [patent_app_type] => utility [patent_app_number] => 18/337418 [patent_app_country] => US [patent_app_date] => 2023-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337418 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/337418
Memory management for multiple process instances Jun 18, 2023 Issued
Array ( [id] => 20716928 [patent_doc_number] => 12632178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Systems and methods for accelerating memory transfers and computation efficiency using a computation-informed partitioning of an on-chip data buffer and implementing computation-aware data transfer operations to the on-chip data buffer [patent_app_type] => utility [patent_app_number] => 18/208650 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9746 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208650 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/208650
Systems and methods for accelerating memory transfers and computation efficiency using a computation-informed partitioning of an on-chip data buffer and implementing computation-aware data transfer operations to the on-chip data buffer Jun 11, 2023 Issued
Array ( [id] => 18772903 [patent_doc_number] => 20230367729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => DYNAMIC CONFIGURATION OF INPUT/OUTPUT CONTROLLER ACCESS LANES [patent_app_type] => utility [patent_app_number] => 18/199042 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18199042 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/199042
Dynamic configuration of input/output controller access lanes May 17, 2023 Issued
Array ( [id] => 20529125 [patent_doc_number] => 12547560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Data interaction method, apparatus and system, and electronic device and storage medium [patent_app_type] => utility [patent_app_number] => 18/844766 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18844766 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/844766
Data interaction method, apparatus and system, and electronic device and storage medium May 16, 2023 Issued
Array ( [id] => 19571378 [patent_doc_number] => 20240375670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => AUTONOMOUS VEHICLE SYSTEM ON CHIP [patent_app_type] => utility [patent_app_number] => 18/195807 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195807 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195807
AUTONOMOUS VEHICLE SYSTEM ON CHIP May 9, 2023 Pending
Array ( [id] => 18569147 [patent_doc_number] => 20230259483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => DEVICE PROCESS SCHEDULING [patent_app_type] => utility [patent_app_number] => 18/138217 [patent_app_country] => US [patent_app_date] => 2023-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138217 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/138217
Device with biometric process synchronization Apr 23, 2023 Issued
Array ( [id] => 19811010 [patent_doc_number] => 12242403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Direct access to reconfigurable processor memory [patent_app_type] => utility [patent_app_number] => 18/121224 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 18672 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121224 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121224
Direct access to reconfigurable processor memory Mar 13, 2023 Issued
Array ( [id] => 18630427 [patent_doc_number] => 20230289320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => Device for decoding the data communication under universal serial bus standard [patent_app_type] => utility [patent_app_number] => 18/176821 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18176821 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/176821
Device for decoding the data communication under universal serial bus standard Feb 28, 2023 Abandoned
Menu