Search

Titus Wong

Examiner (ID: 13324, Phone: (571)270-1627 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2181, 2185, 2184
Total Applications
690
Issued Applications
506
Pending Applications
52
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18694910 [patent_doc_number] => 20230325328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => HARDWARE ACCELERATOR CIRCUITS FOR NEAR STORAGE COMPUTE SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/717533 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717533 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717533
Hardware accelerator circuits for near storage compute systems Apr 10, 2022 Issued
Array ( [id] => 17931949 [patent_doc_number] => 20220327074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIe) SYSTEM AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/707744 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/707744
PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIe) SYSTEM AND METHOD OF OPERATING THE SAME Mar 28, 2022 Pending
Array ( [id] => 18782902 [patent_doc_number] => 11824683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Data processing unit for compute nodes and storage nodes [patent_app_type] => utility [patent_app_number] => 17/657081 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 15662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657081 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657081
Data processing unit for compute nodes and storage nodes Mar 28, 2022 Issued
Array ( [id] => 18678008 [patent_doc_number] => 20230315655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => FAST DATA SYNCHRONIZATION IN PROCESSORS AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/691303 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691303 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/691303
FAST DATA SYNCHRONIZATION IN PROCESSORS AND MEMORY Mar 9, 2022 Pending
Array ( [id] => 18265074 [patent_doc_number] => 20230086316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => NEURAL NETWORK OPERATION METHOD AND APPARATUS [patent_app_type] => utility [patent_app_number] => 17/688288 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688288 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/688288
NEURAL NETWORK OPERATION METHOD AND APPARATUS Mar 6, 2022 Pending
Array ( [id] => 19780028 [patent_doc_number] => 12229061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Electric device including branched signal lines, and electric device including printed circuit board [patent_app_type] => utility [patent_app_number] => 17/670962 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 32 [patent_no_of_words] => 18370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670962 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670962
Electric device including branched signal lines, and electric device including printed circuit board Feb 13, 2022 Issued
Array ( [id] => 19340597 [patent_doc_number] => 12050787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Memory controller systems with nonvolatile memory for storing operating parameters [patent_app_type] => utility [patent_app_number] => 17/650643 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17650643 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/650643
Memory controller systems with nonvolatile memory for storing operating parameters Feb 9, 2022 Issued
Array ( [id] => 18539505 [patent_doc_number] => 20230244613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => SCALABLE STORAGE USING NVME COMMUNICATION [patent_app_type] => utility [patent_app_number] => 17/587285 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587285 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/587285
Scalable storage using NVMe communication Jan 27, 2022 Issued
Array ( [id] => 19849020 [patent_doc_number] => 20250094371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => PROCESSING SYSTEM, PROCESSING APPARATUS, PROCESSING METHOD AND PROGRAM [patent_app_type] => utility [patent_app_number] => 18/726624 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18726624 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/726624
PROCESSING SYSTEM, PROCESSING APPARATUS, PROCESSING METHOD AND PROGRAM Jan 11, 2022 Abandoned
Array ( [id] => 17535498 [patent_doc_number] => 20220114107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => METHOD AND APPARATUS FOR DETECTING ATS-BASED DMA ATTACK [patent_app_type] => utility [patent_app_number] => 17/557363 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/557363
Method and apparatus for detecting ATS-based DMA attack Dec 20, 2021 Issued
Array ( [id] => 17522062 [patent_doc_number] => 20220107911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => APPARATUSES, METHODS, AND SYSTEMS FOR OPERATIONS IN A CONFIGURABLE SPATIAL ACCELERATOR [patent_app_type] => utility [patent_app_number] => 17/550875 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 185251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550875 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550875
Apparatuses, methods, and systems for operations in a configurable spatial accelerator Dec 13, 2021 Issued
Array ( [id] => 17522061 [patent_doc_number] => 20220107910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => SCALABLE INTERRUPT VIRTUALIZATION FOR INPUT/OUTPUT DEVICES [patent_app_type] => utility [patent_app_number] => 17/550977 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16511 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550977
Scalable interrupt virtualization for input/output devices Dec 13, 2021 Issued
Array ( [id] => 18711371 [patent_doc_number] => 20230334000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => AXI BUS STRUCTURE AND CHIP SYSTEM [patent_app_type] => utility [patent_app_number] => 18/042881 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18042881 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/042881
AXI bus structure and chip system Dec 1, 2021 Issued
Array ( [id] => 18834798 [patent_doc_number] => 20230403325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => Method and System for Prefetching Target Address, and Device and Medium [patent_app_type] => utility [patent_app_number] => 18/247543 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4357 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18247543 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/247543
Method of prefetching target address, system, device and storage media thereof Nov 29, 2021 Issued
Array ( [id] => 17931948 [patent_doc_number] => 20220327073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) INTERFACE DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/522843 [patent_app_country] => US [patent_app_date] => 2021-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17522843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/522843
Peripheral component interconnect express (PCIe) interface device and method of operating the same Nov 8, 2021 Issued
Array ( [id] => 17446461 [patent_doc_number] => 20220066966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => EFFICIENT SIGNALING SCHEME FOR HIGH-SPEED ULTRA SHORT REACH INTERFACES [patent_app_type] => utility [patent_app_number] => 17/521612 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/521612
Efficient signaling scheme for high-speed ultra short reach interfaces Nov 7, 2021 Issued
Array ( [id] => 17415879 [patent_doc_number] => 20220050783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => Controlling Cache Size and Priority Using Machine Learning Techniques [patent_app_type] => utility [patent_app_number] => 17/515109 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17515109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/515109
Controlling cache size and priority using machine learning techniques Oct 28, 2021 Issued
Array ( [id] => 18864342 [patent_doc_number] => 20230418778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD AND CONTROL DEVICE FOR RELIABLE ON-BOARD COMMUNICATION [patent_app_type] => utility [patent_app_number] => 18/253145 [patent_app_country] => US [patent_app_date] => 2021-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18253145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/253145
METHOD AND CONTROL DEVICE FOR RELIABLE ON-BOARD COMMUNICATION Oct 25, 2021 Pending
Array ( [id] => 17977461 [patent_doc_number] => 11494321 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-11-08 [patent_title] => State buffer memloc reshaping [patent_app_type] => utility [patent_app_number] => 17/449586 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 27300 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17449586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/449586
State buffer memloc reshaping Sep 29, 2021 Issued
Array ( [id] => 18111417 [patent_doc_number] => 20230004297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => DATA PROTECTION FOR THREE-DIMENSIONAL NAND MEMORY [patent_app_type] => utility [patent_app_number] => 17/487870 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17487870 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/487870
Data protection for three-dimensional NAND memory Sep 27, 2021 Issued
Menu