Search

Toan K. Le

Examiner (ID: 8284, Phone: (571)272-1872 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2825, 3722, 2824
Total Applications
1303
Issued Applications
1255
Pending Applications
5
Abandoned Applications
46

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12033582 [patent_doc_number] => 20170323681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OPERATING VOLTAGE, AND TEMPERATURE VARIATIONS' [patent_app_type] => utility [patent_app_number] => 15/596499 [patent_app_country] => US [patent_app_date] => 2017-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12941 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15596499 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/596499
Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations May 15, 2017 Issued
Array ( [id] => 14063503 [patent_doc_number] => 10236052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Current sense amplifiers, memory devices and methods [patent_app_type] => utility [patent_app_number] => 15/592436 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15592436 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/592436
Current sense amplifiers, memory devices and methods May 10, 2017 Issued
Array ( [id] => 11869311 [patent_doc_number] => 20170236596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/586761 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14395 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15586761 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/586761
Semiconductor device May 3, 2017 Issued
Array ( [id] => 13769025 [patent_doc_number] => 10176859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Non-volatile transistor element including a buried ferroelectric material based storage mechanism [patent_app_type] => utility [patent_app_number] => 15/585709 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 10345 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585709 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/585709
Non-volatile transistor element including a buried ferroelectric material based storage mechanism May 2, 2017 Issued
Array ( [id] => 11869292 [patent_doc_number] => 20170236576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING MULTIPORT MEMORY' [patent_app_type] => utility [patent_app_number] => 15/583093 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12044 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15583093 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/583093
Semiconductor device having multiport memory Apr 30, 2017 Issued
Array ( [id] => 13072229 [patent_doc_number] => 10056909 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-21 [patent_title] => Single-lock delay locked loop with cycle counter and method therefore [patent_app_type] => utility [patent_app_number] => 15/583539 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7427 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15583539 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/583539
Single-lock delay locked loop with cycle counter and method therefore Apr 30, 2017 Issued
Array ( [id] => 12195332 [patent_doc_number] => 09899064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Apparatuses and methods for shifting data' [patent_app_type] => utility [patent_app_number] => 15/583734 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 11431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15583734 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/583734
Apparatuses and methods for shifting data Apr 30, 2017 Issued
Array ( [id] => 14300401 [patent_doc_number] => 10290331 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-14 [patent_title] => Method and system for modulating read operations to support error correction in solid state memory [patent_app_type] => utility [patent_app_number] => 15/581191 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581191 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581191
Method and system for modulating read operations to support error correction in solid state memory Apr 27, 2017 Issued
Array ( [id] => 13082441 [patent_doc_number] => 10061285 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-28 [patent_title] => Encoding a custom cooking program [patent_app_type] => utility [patent_app_number] => 15/489468 [patent_app_country] => US [patent_app_date] => 2017-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15489468 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/489468
Encoding a custom cooking program Apr 16, 2017 Issued
Array ( [id] => 12395622 [patent_doc_number] => 09966126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => Delay circuit of a semiconductor memory device, a semiconductor memory device and a method of operating the same [patent_app_type] => utility [patent_app_number] => 15/486689 [patent_app_country] => US [patent_app_date] => 2017-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 10429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486689 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/486689
Delay circuit of a semiconductor memory device, a semiconductor memory device and a method of operating the same Apr 12, 2017 Issued
Array ( [id] => 12334173 [patent_doc_number] => 09947391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-17 [patent_title] => SRAM based physically unclonable function and method for generating a PUF response [patent_app_type] => utility [patent_app_number] => 15/486049 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486049 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/486049
SRAM based physically unclonable function and method for generating a PUF response Apr 11, 2017 Issued
Array ( [id] => 13484953 [patent_doc_number] => 20180294019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => LOW SWING BITLINE FOR SENSING ARRAYS [patent_app_type] => utility [patent_app_number] => 15/485059 [patent_app_country] => US [patent_app_date] => 2017-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485059 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485059
Low swing bitline for sensing arrays Apr 10, 2017 Issued
Array ( [id] => 13070683 [patent_doc_number] => 10056125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Data storage device and operating method thereof [patent_app_type] => utility [patent_app_number] => 15/484923 [patent_app_country] => US [patent_app_date] => 2017-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15484923 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/484923
Data storage device and operating method thereof Apr 10, 2017 Issued
Array ( [id] => 12649728 [patent_doc_number] => 20180108407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => VOLTAGE REGULATOR AND RESISTANCE VARIABLE MEMORY APPARATUS HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 15/484355 [patent_app_country] => US [patent_app_date] => 2017-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15484355 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/484355
Voltage regulator and resistance variable memory apparatus having the same Apr 10, 2017 Issued
Array ( [id] => 12249931 [patent_doc_number] => 09922714 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-20 [patent_title] => 'Temperature dependent erase in non-volatile storage' [patent_app_type] => utility [patent_app_number] => 15/483493 [patent_app_country] => US [patent_app_date] => 2017-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 18307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15483493 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/483493
Temperature dependent erase in non-volatile storage Apr 9, 2017 Issued
Array ( [id] => 12293421 [patent_doc_number] => 09934826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/481937 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 32476 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481937 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/481937
Semiconductor device Apr 6, 2017 Issued
Array ( [id] => 13694779 [patent_doc_number] => 20170358344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => MULTIPORT MEMORY, MEMORY MACRO AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/481345 [patent_app_country] => US [patent_app_date] => 2017-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481345 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/481345
Multiport memory, memory macro and semiconductor device Apr 5, 2017 Issued
Array ( [id] => 12354534 [patent_doc_number] => 09953688 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-24 [patent_title] => Precharge control device and semiconductor device including the same [patent_app_type] => utility [patent_app_number] => 15/479431 [patent_app_country] => US [patent_app_date] => 2017-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4100 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15479431 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/479431
Precharge control device and semiconductor device including the same Apr 4, 2017 Issued
Array ( [id] => 12235873 [patent_doc_number] => 20180068736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'MEMORY SYSTEM AND METHOD FOR OPERATING THE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/478529 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17131 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478529 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478529
MEMORY SYSTEM AND METHOD FOR OPERATING THE MEMORY SYSTEM Apr 3, 2017 Abandoned
Array ( [id] => 11760073 [patent_doc_number] => 20170206942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'APPARATUSES, CIRCUITS, AND METHODS FOR BIASING SIGNAL LINES' [patent_app_type] => utility [patent_app_number] => 15/474353 [patent_app_country] => US [patent_app_date] => 2017-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15474353 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/474353
Apparatuses, circuits, and methods for biasing signal lines Mar 29, 2017 Issued
Menu