Search

Toan K. Le

Examiner (ID: 18217)

Most Active Art Unit
2824
Art Unit(s)
2825, 2824, 3722
Total Applications
1303
Issued Applications
1255
Pending Applications
5
Abandoned Applications
46

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15732855 [patent_doc_number] => 10614860 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-07 [patent_title] => Systems for discharging leakage current over a range of process, voltage, temperature (PVT) conditions [patent_app_type] => utility [patent_app_number] => 16/384433 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5041 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384433 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/384433
Systems for discharging leakage current over a range of process, voltage, temperature (PVT) conditions Apr 14, 2019 Issued
Array ( [id] => 16347749 [patent_doc_number] => 20200312400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => CLOCK SIGNAL GENERATOR GENERATING FOUR-PHASE CLOCK SIGNALS [patent_app_type] => utility [patent_app_number] => 16/372033 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16372033 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/372033
Clock signal generator generating four-phase clock signals Mar 31, 2019 Issued
Array ( [id] => 16218220 [patent_doc_number] => 10734040 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-04 [patent_title] => Level-shifting transparent window sense amplifier [patent_app_type] => utility [patent_app_number] => 16/369395 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4783 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16369395 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/369395
Level-shifting transparent window sense amplifier Mar 28, 2019 Issued
Array ( [id] => 14628705 [patent_doc_number] => 20190227720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => MULTI-TIER SCHEME FOR LOGICAL STORAGE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/370811 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16370811 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/370811
Multi-tier scheme for logical storage management Mar 28, 2019 Issued
Array ( [id] => 15817707 [patent_doc_number] => 10634022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Virtual filter condition sensor [patent_app_type] => utility [patent_app_number] => 16/369302 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4967 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16369302 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/369302
Virtual filter condition sensor Mar 28, 2019 Issued
Array ( [id] => 16097835 [patent_doc_number] => 20200202904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => SENSING-AMPLIFYING DEVICE [patent_app_type] => utility [patent_app_number] => 16/361199 [patent_app_country] => US [patent_app_date] => 2019-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361199 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/361199
Sensing-amplifying device Mar 20, 2019 Issued
Array ( [id] => 14937811 [patent_doc_number] => 20190304544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/352273 [patent_app_country] => US [patent_app_date] => 2019-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16352273 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/352273
Semiconductor memory device Mar 12, 2019 Issued
Array ( [id] => 14842623 [patent_doc_number] => 20190279712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OPERATING VOLTAGE, AND TEMPERATURE VARIATIONS [patent_app_type] => utility [patent_app_number] => 16/297303 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12277 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16297303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/297303
Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations Mar 7, 2019 Issued
Array ( [id] => 14541757 [patent_doc_number] => 20190206500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => NONVOLATILE MEMORY DEVICE FOR PERFORMING A PARTIAL READ OPERATION AND A METHOD OF READING THE SAME [patent_app_type] => utility [patent_app_number] => 16/296778 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16296778 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/296778
Nonvolatile memory device for performing a partial read operation and a method of reading the same Mar 7, 2019 Issued
Array ( [id] => 16479311 [patent_doc_number] => 10854264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Current-starved delay circuitry [patent_app_type] => utility [patent_app_number] => 16/293465 [patent_app_country] => US [patent_app_date] => 2019-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5334 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293465 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/293465
Current-starved delay circuitry Mar 4, 2019 Issued
Array ( [id] => 15656489 [patent_doc_number] => 20200090775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/290571 [patent_app_country] => US [patent_app_date] => 2019-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16290571 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/290571
Magnetic memory Feb 28, 2019 Issued
Array ( [id] => 15704911 [patent_doc_number] => 10608648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Single-lock delay locked loop with cycle counter and method therefor [patent_app_type] => utility [patent_app_number] => 16/277557 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277557 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277557
Single-lock delay locked loop with cycle counter and method therefor Feb 14, 2019 Issued
Array ( [id] => 15889043 [patent_doc_number] => 10650870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory [patent_app_type] => utility [patent_app_number] => 16/276333 [patent_app_country] => US [patent_app_date] => 2019-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16276333 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/276333
Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory Feb 13, 2019 Issued
Array ( [id] => 15312877 [patent_doc_number] => 10521142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Flash memory controller [patent_app_type] => utility [patent_app_number] => 16/260142 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4837 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16260142 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/260142
Flash memory controller Jan 28, 2019 Issued
Array ( [id] => 16194445 [patent_doc_number] => 20200235294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => Tunable Resistive Element [patent_app_type] => utility [patent_app_number] => 16/255085 [patent_app_country] => US [patent_app_date] => 2019-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16255085 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/255085
Tunable resistive element Jan 22, 2019 Issued
Array ( [id] => 14316473 [patent_doc_number] => 20190147940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => SEMICONDUCTOR DEVICE HAVING MULTIPORT MEMORY [patent_app_type] => utility [patent_app_number] => 16/250275 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 469 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250275 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/250275
Semiconductor device having multiport memory Jan 16, 2019 Issued
Array ( [id] => 15857407 [patent_doc_number] => 10644002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle [patent_app_type] => utility [patent_app_number] => 16/242430 [patent_app_country] => US [patent_app_date] => 2019-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16242430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/242430
Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle Jan 7, 2019 Issued
Array ( [id] => 14284599 [patent_doc_number] => 20190139584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => Method And Apparatus For Memory Power And/Or Area Reduction [patent_app_type] => utility [patent_app_number] => 16/237396 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11519 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16237396 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/237396
Method And Apparatus For Memory Power And/Or Area Reduction Dec 30, 2018 Abandoned
Array ( [id] => 14541669 [patent_doc_number] => 20190206456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => LOW SWING BITLINE FOR SENSING ARRAYS [patent_app_type] => utility [patent_app_number] => 16/234065 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234065 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234065
Low swing bitline for sensing arrays Dec 26, 2018 Issued
Array ( [id] => 15857455 [patent_doc_number] => 10644026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/229035 [patent_app_country] => US [patent_app_date] => 2018-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 8880 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16229035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/229035
Semiconductor device and manufacturing method thereof Dec 20, 2018 Issued
Menu