Search

Toan K. Le

Examiner (ID: 18217)

Most Active Art Unit
2824
Art Unit(s)
2825, 2824, 3722
Total Applications
1303
Issued Applications
1255
Pending Applications
5
Abandoned Applications
46

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13936599 [patent_doc_number] => 20190051815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/058237 [patent_app_country] => US [patent_app_date] => 2018-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23522 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/058237
Magnetic memory Aug 7, 2018 Issued
Array ( [id] => 15461473 [patent_doc_number] => 20200043561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => HOST-RESIDENT TRANSLATION LAYER TRIGGERED HOST REFRESH [patent_app_type] => utility [patent_app_number] => 16/054109 [patent_app_country] => US [patent_app_date] => 2018-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16054109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/054109
Host-resident translation layer triggered host refresh Aug 2, 2018 Issued
Array ( [id] => 15921579 [patent_doc_number] => 10658036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Memory storage apparatus and forming method of resistive memory device [patent_app_type] => utility [patent_app_number] => 16/045749 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3454 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16045749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/045749
Memory storage apparatus and forming method of resistive memory device Jul 25, 2018 Issued
Array ( [id] => 14903717 [patent_doc_number] => 20190295624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR SYSTEM RELATED TO PERFORMING A RESET OPERATION [patent_app_type] => utility [patent_app_number] => 16/043519 [patent_app_country] => US [patent_app_date] => 2018-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7240 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16043519 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/043519
Semiconductor package and semiconductor system related to performing a reset operation Jul 23, 2018 Issued
Array ( [id] => 16464959 [patent_doc_number] => 10848327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Two bit/cell SRAM PUF with enhanced reliability [patent_app_type] => utility [patent_app_number] => 16/021371 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 4965 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16021371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/021371
Two bit/cell SRAM PUF with enhanced reliability Jun 27, 2018 Issued
Array ( [id] => 14488633 [patent_doc_number] => 10331102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Encoding a custom cooking program [patent_app_type] => utility [patent_app_number] => 16/020813 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020813 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020813
Encoding a custom cooking program Jun 26, 2018 Issued
Array ( [id] => 15299507 [patent_doc_number] => 20190392889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => SELF-TIME SCHEME FOR OPTIMIZING PERFORMANCE AND POWER IN DUAL RAIL POWER SUPPLIES MEMORIES [patent_app_type] => utility [patent_app_number] => 16/019477 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16019477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/019477
Self-time scheme for optimizing performance and power in dual rail power supplies memories Jun 25, 2018 Issued
Array ( [id] => 16147679 [patent_doc_number] => 10706914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Static random access memory [patent_app_type] => utility [patent_app_number] => 16/019521 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2927 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16019521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/019521
Static random access memory Jun 25, 2018 Issued
Array ( [id] => 14316463 [patent_doc_number] => 20190147935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => METHOD OF OPERATING FERROELECTRIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/013957 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013957 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013957
Method of operating ferroelectric device Jun 20, 2018 Issued
Array ( [id] => 13784963 [patent_doc_number] => 20190006020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => WORD LINE LEAKAGE DETECTION WITH COMMON MODE TRACKING [patent_app_type] => utility [patent_app_number] => 16/014545 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 59242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014545 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014545
WORD LINE LEAKAGE DETECTION WITH COMMON MODE TRACKING Jun 20, 2018 Abandoned
Array ( [id] => 15427373 [patent_doc_number] => 10546621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Magnetic josephson junction driven flux-biased superconductor memory cell and methods [patent_app_type] => utility [patent_app_number] => 16/013549 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013549
Magnetic josephson junction driven flux-biased superconductor memory cell and methods Jun 19, 2018 Issued
Array ( [id] => 13629295 [patent_doc_number] => 20180366200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => ATOMICITY MANAGEMENT IN AN EEPROM [patent_app_type] => utility [patent_app_number] => 16/007941 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16007941 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/007941
Atomicity management in an EEPROM Jun 12, 2018 Issued
Array ( [id] => 13484957 [patent_doc_number] => 20180294021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => SHIFTING DATA [patent_app_type] => utility [patent_app_number] => 16/006514 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006514
Shifting data Jun 11, 2018 Issued
Array ( [id] => 14445901 [patent_doc_number] => 20190180824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => HYBRID MICROCONTROLLER ARCHITECTURE FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 15/994137 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994137 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994137
Hybrid microcontroller architecture for non-volatile memory May 30, 2018 Issued
Array ( [id] => 15182463 [patent_doc_number] => 20190361823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => MEMORY DEVICE, THE CONTROL METHOD OF THE MEMORY DEVICE AND THE METHOD FOR CONTROLLING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/988387 [patent_app_country] => US [patent_app_date] => 2018-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15988387 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/988387
Memory device, the control method of the memory device and the method for controlling the memory device May 23, 2018 Issued
Array ( [id] => 13432375 [patent_doc_number] => 20180267730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => Flash memory controller [patent_app_type] => utility [patent_app_number] => 15/985718 [patent_app_country] => US [patent_app_date] => 2018-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15985718 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/985718
Flash memory controller May 21, 2018 Issued
Array ( [id] => 15153853 [patent_doc_number] => 20190355404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Ferroelectric Memory Array with Hierarchical Plate-Line Architecture [patent_app_type] => utility [patent_app_number] => 15/984187 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984187 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/984187
Ferroelectric memory array with hierarchical plate-line architecture May 17, 2018 Issued
Array ( [id] => 15153867 [patent_doc_number] => 20190355411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => System, Apparatus And Method For Simultaneous Read And Precharge Of A Memory [patent_app_type] => utility [patent_app_number] => 15/980813 [patent_app_country] => US [patent_app_date] => 2018-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15980813 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/980813
System, apparatus and method for simultaneous read and precharge of a memory May 15, 2018 Issued
Array ( [id] => 14984587 [patent_doc_number] => 10446213 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-15 [patent_title] => Bitline control in differential magnetic memory [patent_app_type] => utility [patent_app_number] => 15/980977 [patent_app_country] => US [patent_app_date] => 2018-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6259 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15980977 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/980977
Bitline control in differential magnetic memory May 15, 2018 Issued
Array ( [id] => 14671539 [patent_doc_number] => 10373684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/968331 [patent_app_country] => US [patent_app_date] => 2018-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 10095 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15968331 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/968331
Semiconductor device Apr 30, 2018 Issued
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