Toan V. Tran

Array ( [id] => 6764325 [patent_doc_number] => 20030098723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Method and apparatus for data sampling' [patent_app_type] => new [patent_app_number] => 10/341352 [patent_app_country] => US [patent_app_date] => 2003-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5593 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20030098723.pdf [firstpage_image] =>[orig_patent_app_number] => 10341352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6656589 [patent_doc_number] => 20030132785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Rail-to-rail CMOS comparator' [patent_app_type] => new [patent_app_number] => 10/335825 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3875 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20030132785.pdf [firstpage_image] =>[orig_patent_app_number] => 10335825 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1311834 [patent_doc_number] => 06617887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-09 [patent_title] => 'Differential comparator with offset correction' [patent_app_type] => B2 [patent_app_number] => 10/331223 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617887.pdf [firstpage_image] =>[orig_patent_app_number] => 10331223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7634149 [patent_doc_number] => 06657471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'High performance, low power differential latch' [patent_app_type] => B1 [patent_app_number] => 10/290649 [patent_app_country] => US [patent_app_date] => 2002-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1321 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/657/06657471.pdf [firstpage_image] =>[orig_patent_app_number] => 10290649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1282207 [patent_doc_number] => 06646479 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Pulse discriminator' [patent_app_type] => B1 [patent_app_number] => 10/287665 [patent_app_country] => US [patent_app_date] => 2002-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7867 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646479.pdf [firstpage_image] =>[orig_patent_app_number] => 10287665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1315690 [patent_doc_number] => 06614272 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Signal voltage detection circuit' [patent_app_type] => B1 [patent_app_number] => 10/285455 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 5057 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614272.pdf [firstpage_image] =>[orig_patent_app_number] => 10285455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6631404 [patent_doc_number] => 20030102893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Inverter output circuit' [patent_app_type] => new [patent_app_number] => 10/282368 [patent_app_country] => US [patent_app_date] => 2002-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3900 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20030102893.pdf [firstpage_image] =>[orig_patent_app_number] => 10282368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1338184 [patent_doc_number] => 06597207 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Vernier structures that substantially eliminate offset signals' [patent_app_type] => B1 [patent_app_number] => 10/272735 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3408 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/597/06597207.pdf [firstpage_image] =>[orig_patent_app_number] => 10272735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6649549 [patent_doc_number] => 20030076151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Function circuit that is less prone to be affected by temperature' [patent_app_type] => new [patent_app_number] => 10/272591 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3879 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20030076151.pdf [firstpage_image] =>[orig_patent_app_number] => 10272591 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6728169 [patent_doc_number] => 20030184359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Current leakage compensation circuit and method' [patent_app_type] => new [patent_app_number] => 10/266885 [patent_app_country] => US [patent_app_date] => 2002-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3340 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20030184359.pdf [firstpage_image] =>[orig_patent_app_number] => 10266885 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1311980 [patent_doc_number] => 06617906 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Low-current compliance stack using nondeterministically biased Zener strings' [patent_app_type] => B1 [patent_app_number] => 10/261775 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617906.pdf [firstpage_image] =>[orig_patent_app_number] => 10261775 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1285530 [patent_doc_number] => 06642749 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Latching sense amplifier with tri-state output' [patent_app_type] => B1 [patent_app_number] => 10/256752 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3629 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642749.pdf [firstpage_image] =>[orig_patent_app_number] => 10256752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6781490 [patent_doc_number] => 20030062937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Output circuit for adjusting output voltage slew rate' [patent_app_type] => new [patent_app_number] => 10/256669 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062937.pdf [firstpage_image] =>[orig_patent_app_number] => 10256669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1277991 [patent_doc_number] => 06650170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Temperature compensated output driver' [patent_app_type] => B1 [patent_app_number] => 10/259080 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2518 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/650/06650170.pdf [firstpage_image] =>[orig_patent_app_number] => 10259080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1322688 [patent_doc_number] => 06605978 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'Method of forming a voltage detection device and structure therefor' [patent_app_type] => B1 [patent_app_number] => 10/254274 [patent_app_country] => US [patent_app_date] => 2002-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3735 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/605/06605978.pdf [firstpage_image] =>[orig_patent_app_number] => 10254274 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1285625 [patent_doc_number] => 06642767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'DC offset cancellation' [patent_app_type] => B2 [patent_app_number] => 10/245827 [patent_app_country] => US [patent_app_date] => 2002-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3152 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642767.pdf [firstpage_image] =>[orig_patent_app_number] => 10245827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1410035 [patent_doc_number] => 06538483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-25 [patent_title] => 'Method and apparatus for data sampling' [patent_app_type] => B2 [patent_app_number] => 10/217624 [patent_app_country] => US [patent_app_date] => 2002-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5620 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538483.pdf [firstpage_image] =>[orig_patent_app_number] => 10217624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6753855 [patent_doc_number] => 20030001631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Gate coupled voltage support for an output driver circuit' [patent_app_type] => new [patent_app_number] => 10/218258 [patent_app_country] => US [patent_app_date] => 2002-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4674 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20030001631.pdf [firstpage_image] =>[orig_patent_app_number] => 10218258 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1320290 [patent_doc_number] => 06608503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-19 [patent_title] => 'Hybrid comparator and method' [patent_app_type] => B2 [patent_app_number] => 10/217892 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 4856 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/608/06608503.pdf [firstpage_image] =>[orig_patent_app_number] => 10217892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6686754 [patent_doc_number] => 20030030477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/216065 [patent_app_country] => US [patent_app_date] => 2002-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1459 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20030030477.pdf [firstpage_image] =>[orig_patent_app_number] => 10216065 [rel_patent_id] =>[rel_patent_doc_number] =>)