Search

Toan V. Tran

Examiner (ID: 4400)

Most Active Art Unit
2816
Art Unit(s)
2899, 2816, 2504, 3621
Total Applications
1179
Issued Applications
1083
Pending Applications
23
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4322271 [patent_doc_number] => 06242958 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Master slave flip flop as a dynamic latch' [patent_app_type] => 1 [patent_app_number] => 9/473975 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3884 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242958.pdf [firstpage_image] =>[orig_patent_app_number] => 473975 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/473975
Master slave flip flop as a dynamic latch Dec 28, 1999 Issued
Array ( [id] => 4363152 [patent_doc_number] => 06218872 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Line driver with output impedance synthesis' [patent_app_type] => 1 [patent_app_number] => 9/470777 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4053 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218872.pdf [firstpage_image] =>[orig_patent_app_number] => 470777 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/470777
Line driver with output impedance synthesis Dec 22, 1999 Issued
Array ( [id] => 4416074 [patent_doc_number] => 06229354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Method and circuit arrangement for signal processing' [patent_app_type] => 1 [patent_app_number] => 9/469204 [patent_app_country] => US [patent_app_date] => 1999-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 8687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229354.pdf [firstpage_image] =>[orig_patent_app_number] => 469204 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/469204
Method and circuit arrangement for signal processing Dec 20, 1999 Issued
Array ( [id] => 4353478 [patent_doc_number] => 06285234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Current-mode magnetic isolator for switching DC-DC converters' [patent_app_type] => 1 [patent_app_number] => 9/467868 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2637 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/285/06285234.pdf [firstpage_image] =>[orig_patent_app_number] => 467868 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/467868
Current-mode magnetic isolator for switching DC-DC converters Dec 19, 1999 Issued
Array ( [id] => 4165352 [patent_doc_number] => 06157239 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Integrated full bridge circuit with four transistors' [patent_app_type] => 1 [patent_app_number] => 9/468372 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2437 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157239.pdf [firstpage_image] =>[orig_patent_app_number] => 468372 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/468372
Integrated full bridge circuit with four transistors Dec 19, 1999 Issued
Array ( [id] => 4415954 [patent_doc_number] => 06265908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Low voltage balun circuit' [patent_app_type] => 1 [patent_app_number] => 9/461596 [patent_app_country] => US [patent_app_date] => 1999-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2010 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265908.pdf [firstpage_image] =>[orig_patent_app_number] => 461596 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/461596
Low voltage balun circuit Dec 14, 1999 Issued
Array ( [id] => 4363267 [patent_doc_number] => 06201430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Computational circuit' [patent_app_type] => 1 [patent_app_number] => 9/459889 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3537 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201430.pdf [firstpage_image] =>[orig_patent_app_number] => 459889 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/459889
Computational circuit Dec 13, 1999 Issued
Array ( [id] => 4378758 [patent_doc_number] => 06288579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Method to increase frequency of digital circuits' [patent_app_type] => 1 [patent_app_number] => 9/456099 [patent_app_country] => US [patent_app_date] => 1999-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2260 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288579.pdf [firstpage_image] =>[orig_patent_app_number] => 456099 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/456099
Method to increase frequency of digital circuits Dec 6, 1999 Issued
Array ( [id] => 4363393 [patent_doc_number] => 06218886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Device for compensating process and operating parameter variations in CMOS integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/452643 [patent_app_country] => US [patent_app_date] => 1999-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4357 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218886.pdf [firstpage_image] =>[orig_patent_app_number] => 452643 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/452643
Device for compensating process and operating parameter variations in CMOS integrated circuits Nov 30, 1999 Issued
Array ( [id] => 4304096 [patent_doc_number] => 06198329 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Auto zero circuitry and associated method' [patent_app_type] => 1 [patent_app_number] => 9/438252 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2512 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/198/06198329.pdf [firstpage_image] =>[orig_patent_app_number] => 438252 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/438252
Auto zero circuitry and associated method Nov 11, 1999 Issued
Array ( [id] => 4414646 [patent_doc_number] => 06239642 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Integrated circuits with variable signal line loading circuits and methods of operation thereof' [patent_app_type] => 1 [patent_app_number] => 9/437897 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3768 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239642.pdf [firstpage_image] =>[orig_patent_app_number] => 437897 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/437897
Integrated circuits with variable signal line loading circuits and methods of operation thereof Nov 8, 1999 Issued
Array ( [id] => 4416150 [patent_doc_number] => 06265927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Anti-saturation integrator and method' [patent_app_type] => 1 [patent_app_number] => 9/434704 [patent_app_country] => US [patent_app_date] => 1999-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1589 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265927.pdf [firstpage_image] =>[orig_patent_app_number] => 434704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/434704
Anti-saturation integrator and method Nov 4, 1999 Issued
Array ( [id] => 4366997 [patent_doc_number] => 06191620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Sense amplifier/comparator circuit and data comparison method' [patent_app_type] => 1 [patent_app_number] => 9/435064 [patent_app_country] => US [patent_app_date] => 1999-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191620.pdf [firstpage_image] =>[orig_patent_app_number] => 435064 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/435064
Sense amplifier/comparator circuit and data comparison method Nov 3, 1999 Issued
Array ( [id] => 4303632 [patent_doc_number] => 06184728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Output circuit' [patent_app_type] => 1 [patent_app_number] => 9/433252 [patent_app_country] => US [patent_app_date] => 1999-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3171 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184728.pdf [firstpage_image] =>[orig_patent_app_number] => 433252 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433252
Output circuit Nov 3, 1999 Issued
Array ( [id] => 4413397 [patent_doc_number] => 06172535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'High-speed analog comparator structures and methods' [patent_app_type] => 1 [patent_app_number] => 9/433841 [patent_app_country] => US [patent_app_date] => 1999-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4193 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172535.pdf [firstpage_image] =>[orig_patent_app_number] => 433841 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433841
High-speed analog comparator structures and methods Nov 3, 1999 Issued
Array ( [id] => 4339232 [patent_doc_number] => 06313670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Integrated driver circuits having current control capability' [patent_app_type] => 1 [patent_app_number] => 9/433099 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3669 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313670.pdf [firstpage_image] =>[orig_patent_app_number] => 433099 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433099
Integrated driver circuits having current control capability Nov 2, 1999 Issued
Array ( [id] => 4299817 [patent_doc_number] => 06236247 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Impedance pseudo-matched write driver' [patent_app_type] => 1 [patent_app_number] => 9/433177 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2798 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/236/06236247.pdf [firstpage_image] =>[orig_patent_app_number] => 433177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433177
Impedance pseudo-matched write driver Nov 2, 1999 Issued
Array ( [id] => 4311749 [patent_doc_number] => 06188259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Self-reset flip-flop with self shut-off mechanism' [patent_app_type] => 1 [patent_app_number] => 9/433518 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2313 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/188/06188259.pdf [firstpage_image] =>[orig_patent_app_number] => 433518 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433518
Self-reset flip-flop with self shut-off mechanism Nov 2, 1999 Issued
Array ( [id] => 4368644 [patent_doc_number] => 06255865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Track-and-hold circuit' [patent_app_type] => 1 [patent_app_number] => 9/433838 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2574 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255865.pdf [firstpage_image] =>[orig_patent_app_number] => 433838 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433838
Track-and-hold circuit Nov 2, 1999 Issued
Array ( [id] => 4320223 [patent_doc_number] => 06316968 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Sense amplifier circuit' [patent_app_type] => 1 [patent_app_number] => 9/355596 [patent_app_country] => US [patent_app_date] => 1999-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2214 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316968.pdf [firstpage_image] =>[orig_patent_app_number] => 355596 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/355596
Sense amplifier circuit Oct 18, 1999 Issued
Menu