Search

Toan V. Tran

Examiner (ID: 4400)

Most Active Art Unit
2816
Art Unit(s)
2899, 2816, 2504, 3621
Total Applications
1179
Issued Applications
1083
Pending Applications
23
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1535113 [patent_doc_number] => 06411148 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Telemetering apparatus' [patent_app_type] => B1 [patent_app_number] => 09/418508 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 117 [patent_no_of_words] => 54904 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/411/06411148.pdf [firstpage_image] =>[orig_patent_app_number] => 09418508 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/418508
Telemetering apparatus Oct 14, 1999 Issued
Array ( [id] => 4363148 [patent_doc_number] => 06201422 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'State machine, semiconductor device and electronic equipment' [patent_app_type] => 1 [patent_app_number] => 9/355242 [patent_app_country] => US [patent_app_date] => 1999-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 6949 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201422.pdf [firstpage_image] =>[orig_patent_app_number] => 355242 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/355242
State machine, semiconductor device and electronic equipment Oct 12, 1999 Issued
Array ( [id] => 1307347 [patent_doc_number] => 06621319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Edge-triggered toggle flip-flop circuit' [patent_app_type] => B1 [patent_app_number] => 09/407535 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 2747 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/621/06621319.pdf [firstpage_image] =>[orig_patent_app_number] => 09407535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/407535
Edge-triggered toggle flip-flop circuit Sep 28, 1999 Issued
Array ( [id] => 4322380 [patent_doc_number] => 06242966 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Leakage current correcting circuit' [patent_app_type] => 1 [patent_app_number] => 9/380068 [patent_app_country] => US [patent_app_date] => 1999-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3762 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242966.pdf [firstpage_image] =>[orig_patent_app_number] => 380068 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/380068
Leakage current correcting circuit Aug 24, 1999 Issued
Array ( [id] => 4312735 [patent_doc_number] => 06252451 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Switching circuit' [patent_app_type] => 1 [patent_app_number] => 9/375858 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3825 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252451.pdf [firstpage_image] =>[orig_patent_app_number] => 375858 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/375858
Switching circuit Aug 16, 1999 Issued
Array ( [id] => 4192405 [patent_doc_number] => 06160424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Low supply voltage comparator in BICMOS technology' [patent_app_type] => 1 [patent_app_number] => 9/376106 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6363 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160424.pdf [firstpage_image] =>[orig_patent_app_number] => 376106 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/376106
Low supply voltage comparator in BICMOS technology Aug 16, 1999 Issued
Array ( [id] => 4413452 [patent_doc_number] => 06172540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Apparatus for fast logic transfer of data across asynchronous clock domains' [patent_app_type] => 1 [patent_app_number] => 9/374798 [patent_app_country] => US [patent_app_date] => 1999-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3433 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172540.pdf [firstpage_image] =>[orig_patent_app_number] => 374798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/374798
Apparatus for fast logic transfer of data across asynchronous clock domains Aug 15, 1999 Issued
Array ( [id] => 4197545 [patent_doc_number] => 06154082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Projection device against electrostatic discharges' [patent_app_type] => 1 [patent_app_number] => 9/374379 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2345 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154082.pdf [firstpage_image] =>[orig_patent_app_number] => 374379 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/374379
Projection device against electrostatic discharges Aug 12, 1999 Issued
Array ( [id] => 1497984 [patent_doc_number] => 06404265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Highly efficient driver circuit for a solid state switch' [patent_app_type] => B1 [patent_app_number] => 09/373502 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2768 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404265.pdf [firstpage_image] =>[orig_patent_app_number] => 09373502 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/373502
Highly efficient driver circuit for a solid state switch Aug 12, 1999 Issued
Array ( [id] => 4387791 [patent_doc_number] => 06304120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Buffer circuit operating with a small through current and potential detecting circuit using the same' [patent_app_type] => 1 [patent_app_number] => 9/372592 [patent_app_country] => US [patent_app_date] => 1999-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6292 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304120.pdf [firstpage_image] =>[orig_patent_app_number] => 372592 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/372592
Buffer circuit operating with a small through current and potential detecting circuit using the same Aug 11, 1999 Issued
Array ( [id] => 4149823 [patent_doc_number] => 06031400 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Circuit with multiple output voltages for multiple analog to digital converters' [patent_app_type] => 1 [patent_app_number] => 9/358847 [patent_app_country] => US [patent_app_date] => 1999-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3760 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031400.pdf [firstpage_image] =>[orig_patent_app_number] => 358847 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/358847
Circuit with multiple output voltages for multiple analog to digital converters Jul 21, 1999 Issued
Array ( [id] => 4358090 [patent_doc_number] => 06215342 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Power-on reset circuit for dual-supply system' [patent_app_type] => 1 [patent_app_number] => 9/353514 [patent_app_country] => US [patent_app_date] => 1999-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3446 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215342.pdf [firstpage_image] =>[orig_patent_app_number] => 353514 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/353514
Power-on reset circuit for dual-supply system Jul 13, 1999 Issued
Array ( [id] => 4302747 [patent_doc_number] => 06181180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Flip-flop circuit' [patent_app_type] => 1 [patent_app_number] => 9/340417 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3121 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/181/06181180.pdf [firstpage_image] =>[orig_patent_app_number] => 340417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340417
Flip-flop circuit Jun 27, 1999 Issued
Array ( [id] => 4257139 [patent_doc_number] => 06222404 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Edge-triggered dual-rail dynamic flip-flop with an enhanced self-shut-off mechanism' [patent_app_type] => 1 [patent_app_number] => 9/340745 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7479 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222404.pdf [firstpage_image] =>[orig_patent_app_number] => 340745 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340745
Edge-triggered dual-rail dynamic flip-flop with an enhanced self-shut-off mechanism Jun 27, 1999 Issued
Array ( [id] => 4302733 [patent_doc_number] => 06181179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Scan flip-flop circuit' [patent_app_type] => 1 [patent_app_number] => 9/333579 [patent_app_country] => US [patent_app_date] => 1999-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 29 [patent_no_of_words] => 3570 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/181/06181179.pdf [firstpage_image] =>[orig_patent_app_number] => 333579 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/333579
Scan flip-flop circuit Jun 14, 1999 Issued
09/322681 DIGITALLY CONTROLLED SIGNAL MAGNITUDE CONTROL CIRCUIT May 27, 1999 Abandoned
Array ( [id] => 4256201 [patent_doc_number] => 06137351 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Universal current source and current sink interface' [patent_app_type] => 1 [patent_app_number] => 9/322091 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2155 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/137/06137351.pdf [firstpage_image] =>[orig_patent_app_number] => 322091 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/322091
Universal current source and current sink interface May 27, 1999 Issued
Array ( [id] => 4412727 [patent_doc_number] => 06232802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Selective sampled peak detector and method' [patent_app_type] => 1 [patent_app_number] => 9/321938 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4005 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232802.pdf [firstpage_image] =>[orig_patent_app_number] => 321938 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/321938
Selective sampled peak detector and method May 27, 1999 Issued
Array ( [id] => 4322455 [patent_doc_number] => 06242971 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Monolithically integrated selector for electrically programmable memory cell devices' [patent_app_type] => 1 [patent_app_number] => 9/321961 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3247 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242971.pdf [firstpage_image] =>[orig_patent_app_number] => 321961 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/321961
Monolithically integrated selector for electrically programmable memory cell devices May 27, 1999 Issued
Array ( [id] => 4296631 [patent_doc_number] => 06211717 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Multiple differential pair transistor architecture having transconductance proportional to bias current for any transistor technology' [patent_app_type] => 1 [patent_app_number] => 9/322961 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2191 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211717.pdf [firstpage_image] =>[orig_patent_app_number] => 322961 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/322961
Multiple differential pair transistor architecture having transconductance proportional to bias current for any transistor technology May 27, 1999 Issued
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