Search

Toan V. Tran

Examiner (ID: 4400)

Most Active Art Unit
2816
Art Unit(s)
2899, 2816, 2504, 3621
Total Applications
1179
Issued Applications
1083
Pending Applications
23
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4246508 [patent_doc_number] => 06166591 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'FET gate biasing control device for power amplifier' [patent_app_type] => 1 [patent_app_number] => 9/209284 [patent_app_country] => US [patent_app_date] => 1998-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2689 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166591.pdf [firstpage_image] =>[orig_patent_app_number] => 209284 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/209284
FET gate biasing control device for power amplifier Dec 10, 1998 Issued
Array ( [id] => 4139509 [patent_doc_number] => 06147514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Sense amplifier circuit' [patent_app_type] => 1 [patent_app_number] => 9/208187 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 7981 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147514.pdf [firstpage_image] =>[orig_patent_app_number] => 208187 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208187
Sense amplifier circuit Dec 8, 1998 Issued
Array ( [id] => 4415138 [patent_doc_number] => 06310509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Differential multiplexer with high bandwidth and reduced crosstalk' [patent_app_type] => 1 [patent_app_number] => 9/208625 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2610 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310509.pdf [firstpage_image] =>[orig_patent_app_number] => 208625 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208625
Differential multiplexer with high bandwidth and reduced crosstalk Dec 7, 1998 Issued
Array ( [id] => 4225583 [patent_doc_number] => 06087888 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Field effect transistor gate bias voltage application circuit and semiconductor apparatus having field effect transistor gate bias voltage application circuit' [patent_app_type] => 1 [patent_app_number] => 9/195659 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7828 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087888.pdf [firstpage_image] =>[orig_patent_app_number] => 195659 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195659
Field effect transistor gate bias voltage application circuit and semiconductor apparatus having field effect transistor gate bias voltage application circuit Nov 17, 1998 Issued
Array ( [id] => 4284884 [patent_doc_number] => 06281716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Potential detect circuit for detecting whether output potential of potential generation circuit has arrived at target potential or not' [patent_app_type] => 1 [patent_app_number] => 9/195454 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 8361 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281716.pdf [firstpage_image] =>[orig_patent_app_number] => 195454 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195454
Potential detect circuit for detecting whether output potential of potential generation circuit has arrived at target potential or not Nov 17, 1998 Issued
Array ( [id] => 4160715 [patent_doc_number] => 06124738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Input buffer for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/195453 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4148 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124738.pdf [firstpage_image] =>[orig_patent_app_number] => 195453 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195453
Input buffer for semiconductor device Nov 17, 1998 Issued
Array ( [id] => 4413473 [patent_doc_number] => 06172542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Selectable single ended-to differential output adjustment scheme' [patent_app_type] => 1 [patent_app_number] => 9/192715 [patent_app_country] => US [patent_app_date] => 1998-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2460 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172542.pdf [firstpage_image] =>[orig_patent_app_number] => 192715 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192715
Selectable single ended-to differential output adjustment scheme Nov 15, 1998 Issued
Array ( [id] => 4192476 [patent_doc_number] => 06160429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Power-on reset circuit' [patent_app_type] => 1 [patent_app_number] => 9/190308 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3170 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160429.pdf [firstpage_image] =>[orig_patent_app_number] => 190308 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/190308
Power-on reset circuit Nov 11, 1998 Issued
Array ( [id] => 4147932 [patent_doc_number] => 06060934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Cell including a pseudo-capacitor, in particular for an artificial retina' [patent_app_type] => 1 [patent_app_number] => 9/189707 [patent_app_country] => US [patent_app_date] => 1998-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3583 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060934.pdf [firstpage_image] =>[orig_patent_app_number] => 189707 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/189707
Cell including a pseudo-capacitor, in particular for an artificial retina Nov 10, 1998 Issued
Array ( [id] => 4121854 [patent_doc_number] => 06046609 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Sense amplifier circuit' [patent_app_type] => 1 [patent_app_number] => 9/188369 [patent_app_country] => US [patent_app_date] => 1998-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6689 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046609.pdf [firstpage_image] =>[orig_patent_app_number] => 188369 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/188369
Sense amplifier circuit Nov 9, 1998 Issued
Array ( [id] => 4164126 [patent_doc_number] => 06107853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Sense amplifier based flip-flop' [patent_app_type] => 1 [patent_app_number] => 9/189065 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3163 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107853.pdf [firstpage_image] =>[orig_patent_app_number] => 189065 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/189065
Sense amplifier based flip-flop Nov 8, 1998 Issued
Array ( [id] => 4106542 [patent_doc_number] => 06066978 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Partial product generating circuit' [patent_app_type] => 1 [patent_app_number] => 9/186581 [patent_app_country] => US [patent_app_date] => 1998-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5638 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 534 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066978.pdf [firstpage_image] =>[orig_patent_app_number] => 186581 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/186581
Partial product generating circuit Nov 4, 1998 Issued
Array ( [id] => 4267370 [patent_doc_number] => 06204708 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Apparatus and method for an improved master-slave flip-flop with non-overlapping clocks' [patent_app_type] => 1 [patent_app_number] => 9/182088 [patent_app_country] => US [patent_app_date] => 1998-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 2362 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 529 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204708.pdf [firstpage_image] =>[orig_patent_app_number] => 182088 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/182088
Apparatus and method for an improved master-slave flip-flop with non-overlapping clocks Oct 28, 1998 Issued
Array ( [id] => 4139588 [patent_doc_number] => 06147519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Low-voltage comparator with wide input voltage swing' [patent_app_type] => 1 [patent_app_number] => 9/173982 [patent_app_country] => US [patent_app_date] => 1998-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2108 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147519.pdf [firstpage_image] =>[orig_patent_app_number] => 173982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/173982
Low-voltage comparator with wide input voltage swing Oct 15, 1998 Issued
Array ( [id] => 4225635 [patent_doc_number] => 06087891 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Integrated power supply voltage generators having reduced susceptibility to parasitic latch-up during set-up mode operation' [patent_app_type] => 1 [patent_app_number] => 9/160073 [patent_app_country] => US [patent_app_date] => 1998-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2777 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087891.pdf [firstpage_image] =>[orig_patent_app_number] => 160073 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/160073
Integrated power supply voltage generators having reduced susceptibility to parasitic latch-up during set-up mode operation Sep 23, 1998 Issued
Array ( [id] => 4260167 [patent_doc_number] => 06208176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Adaptive driver circuit for semiconductor magnetoresistors' [patent_app_type] => 1 [patent_app_number] => 9/156139 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2082 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208176.pdf [firstpage_image] =>[orig_patent_app_number] => 156139 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156139
Adaptive driver circuit for semiconductor magnetoresistors Sep 16, 1998 Issued
Array ( [id] => 4225519 [patent_doc_number] => 06087885 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Semiconductor device allowing fast and stable transmission of signals' [patent_app_type] => 1 [patent_app_number] => 9/149050 [patent_app_country] => US [patent_app_date] => 1998-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 75 [patent_no_of_words] => 35935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087885.pdf [firstpage_image] =>[orig_patent_app_number] => 149050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/149050
Semiconductor device allowing fast and stable transmission of signals Sep 7, 1998 Issued
Array ( [id] => 4125592 [patent_doc_number] => 06072352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Heterojunction biopolar mixer circuitry' [patent_app_type] => 1 [patent_app_number] => 9/138581 [patent_app_country] => US [patent_app_date] => 1998-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2333 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072352.pdf [firstpage_image] =>[orig_patent_app_number] => 138581 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/138581
Heterojunction biopolar mixer circuitry Aug 20, 1998 Issued
Array ( [id] => 4011839 [patent_doc_number] => 06005431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'High band width, high gain offset compensating amplifier system for a read channel' [patent_app_type] => 1 [patent_app_number] => 9/126489 [patent_app_country] => US [patent_app_date] => 1998-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2961 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/005/06005431.pdf [firstpage_image] =>[orig_patent_app_number] => 126489 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/126489
High band width, high gain offset compensating amplifier system for a read channel Jul 29, 1998 Issued
Array ( [id] => 4121894 [patent_doc_number] => 06046612 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Self-resetting comparator circuit and method' [patent_app_type] => 1 [patent_app_number] => 9/123191 [patent_app_country] => US [patent_app_date] => 1998-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 18 [patent_no_of_words] => 3336 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046612.pdf [firstpage_image] =>[orig_patent_app_number] => 123191 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/123191
Self-resetting comparator circuit and method Jul 26, 1998 Issued
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