Search

Toan V. Tran

Examiner (ID: 4400)

Most Active Art Unit
2816
Art Unit(s)
2899, 2816, 2504, 3621
Total Applications
1179
Issued Applications
1083
Pending Applications
23
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4189446 [patent_doc_number] => 06020774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Gated clock tree synthesis method for the logic design' [patent_app_type] => 1 [patent_app_number] => 9/121296 [patent_app_country] => US [patent_app_date] => 1998-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2078 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020774.pdf [firstpage_image] =>[orig_patent_app_number] => 121296 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121296
Gated clock tree synthesis method for the logic design Jul 22, 1998 Issued
Array ( [id] => 4225346 [patent_doc_number] => 06087873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Precision hysteresis circuit' [patent_app_type] => 1 [patent_app_number] => 9/119945 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3191 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087873.pdf [firstpage_image] =>[orig_patent_app_number] => 119945 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/119945
Precision hysteresis circuit Jul 20, 1998 Issued
Array ( [id] => 4115430 [patent_doc_number] => 06057724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Method and apparatus for synchronized clock distribution' [patent_app_type] => 1 [patent_app_number] => 9/114732 [patent_app_country] => US [patent_app_date] => 1998-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2441 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057724.pdf [firstpage_image] =>[orig_patent_app_number] => 114732 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/114732
Method and apparatus for synchronized clock distribution Jul 12, 1998 Issued
Array ( [id] => 4077733 [patent_doc_number] => 06069509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Output stage with slewing control means' [patent_app_type] => 1 [patent_app_number] => 9/111612 [patent_app_country] => US [patent_app_date] => 1998-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3991 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069509.pdf [firstpage_image] =>[orig_patent_app_number] => 111612 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/111612
Output stage with slewing control means Jul 6, 1998 Issued
Array ( [id] => 4121935 [patent_doc_number] => 06046615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Level detection circuit' [patent_app_type] => 1 [patent_app_number] => 9/094825 [patent_app_country] => US [patent_app_date] => 1998-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3631 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046615.pdf [firstpage_image] =>[orig_patent_app_number] => 094825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/094825
Level detection circuit Jun 14, 1998 Issued
Array ( [id] => 4191713 [patent_doc_number] => 06150851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Charge transfer amplifier circuit, voltage comparator, and sense amplifier' [patent_app_type] => 1 [patent_app_number] => 9/092465 [patent_app_country] => US [patent_app_date] => 1998-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 16381 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150851.pdf [firstpage_image] =>[orig_patent_app_number] => 092465 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/092465
Charge transfer amplifier circuit, voltage comparator, and sense amplifier Jun 4, 1998 Issued
Array ( [id] => 4121881 [patent_doc_number] => 06046611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Semiconductor circuit device with receiver circuit' [patent_app_type] => 1 [patent_app_number] => 9/089452 [patent_app_country] => US [patent_app_date] => 1998-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 7376 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046611.pdf [firstpage_image] =>[orig_patent_app_number] => 089452 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/089452
Semiconductor circuit device with receiver circuit Jun 2, 1998 Issued
Array ( [id] => 4072982 [patent_doc_number] => 06008681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method and apparatus for deriving power from a clock signal coupled through a transformer' [patent_app_type] => 1 [patent_app_number] => 9/088629 [patent_app_country] => US [patent_app_date] => 1998-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1195 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008681.pdf [firstpage_image] =>[orig_patent_app_number] => 088629 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/088629
Method and apparatus for deriving power from a clock signal coupled through a transformer Jun 1, 1998 Issued
Array ( [id] => 3946966 [patent_doc_number] => 05973551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Abnormal current detection circuit and load drive circuit including the same' [patent_app_type] => 1 [patent_app_number] => 9/087636 [patent_app_country] => US [patent_app_date] => 1998-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3897 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973551.pdf [firstpage_image] =>[orig_patent_app_number] => 087636 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/087636
Abnormal current detection circuit and load drive circuit including the same May 28, 1998 Issued
Array ( [id] => 4224461 [patent_doc_number] => 06111437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Wide common-mode differential receiver with precision input referred offset' [patent_app_type] => 1 [patent_app_number] => 9/087297 [patent_app_country] => US [patent_app_date] => 1998-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111437.pdf [firstpage_image] =>[orig_patent_app_number] => 087297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/087297
Wide common-mode differential receiver with precision input referred offset May 28, 1998 Issued
Array ( [id] => 3946462 [patent_doc_number] => 05973517 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Speed-enhancing comparator with cascaded inventors' [patent_app_type] => 1 [patent_app_number] => 9/086248 [patent_app_country] => US [patent_app_date] => 1998-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2531 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973517.pdf [firstpage_image] =>[orig_patent_app_number] => 086248 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/086248
Speed-enhancing comparator with cascaded inventors May 27, 1998 Issued
Array ( [id] => 4211866 [patent_doc_number] => 06078208 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Precision temperature sensor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/085828 [patent_app_country] => US [patent_app_date] => 1998-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3210 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078208.pdf [firstpage_image] =>[orig_patent_app_number] => 085828 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/085828
Precision temperature sensor integrated circuit May 27, 1998 Issued
Array ( [id] => 4214391 [patent_doc_number] => 06028472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Temperature sensing circuit, driving apparatus, and printer' [patent_app_type] => 1 [patent_app_number] => 9/083065 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 55 [patent_no_of_words] => 21868 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028472.pdf [firstpage_image] =>[orig_patent_app_number] => 083065 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/083065
Temperature sensing circuit, driving apparatus, and printer May 20, 1998 Issued
Array ( [id] => 4186582 [patent_doc_number] => 06037807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Synchronous sense amplifier with temperature and voltage compensated translator' [patent_app_type] => 1 [patent_app_number] => 9/080710 [patent_app_country] => US [patent_app_date] => 1998-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7602 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/037/06037807.pdf [firstpage_image] =>[orig_patent_app_number] => 080710 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/080710
Synchronous sense amplifier with temperature and voltage compensated translator May 17, 1998 Issued
Array ( [id] => 3950345 [patent_doc_number] => 05982202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Method and apparatus for pre-biasing inputs to a latching portion of a sensing amplifier' [patent_app_type] => 1 [patent_app_number] => 9/078451 [patent_app_country] => US [patent_app_date] => 1998-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1963 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/982/05982202.pdf [firstpage_image] =>[orig_patent_app_number] => 078451 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/078451
Method and apparatus for pre-biasing inputs to a latching portion of a sensing amplifier May 12, 1998 Issued
Array ( [id] => 4189362 [patent_doc_number] => 06020768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'CMOS low-voltage comparator' [patent_app_type] => 1 [patent_app_number] => 9/078404 [patent_app_country] => US [patent_app_date] => 1998-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4530 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020768.pdf [firstpage_image] =>[orig_patent_app_number] => 078404 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/078404
CMOS low-voltage comparator May 12, 1998 Issued
Array ( [id] => 3957022 [patent_doc_number] => 05977812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Circuit and method for providing a generally log logarithmic transfer function' [patent_app_type] => 1 [patent_app_number] => 9/074836 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/977/05977812.pdf [firstpage_image] =>[orig_patent_app_number] => 074836 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074836
Circuit and method for providing a generally log logarithmic transfer function May 7, 1998 Issued
Array ( [id] => 4214152 [patent_doc_number] => 06028457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'CMOS comparator' [patent_app_type] => 1 [patent_app_number] => 9/068353 [patent_app_country] => US [patent_app_date] => 1998-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1933 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028457.pdf [firstpage_image] =>[orig_patent_app_number] => 068353 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/068353
CMOS comparator May 6, 1998 Issued
Array ( [id] => 3920172 [patent_doc_number] => 06002287 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Signal outputting apparatus' [patent_app_type] => 1 [patent_app_number] => 9/072179 [patent_app_country] => US [patent_app_date] => 1998-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 6462 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002287.pdf [firstpage_image] =>[orig_patent_app_number] => 072179 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/072179
Signal outputting apparatus May 4, 1998 Issued
Array ( [id] => 4110445 [patent_doc_number] => 06052003 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'CMOS delay circuit' [patent_app_type] => 1 [patent_app_number] => 9/071352 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5369 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052003.pdf [firstpage_image] =>[orig_patent_app_number] => 071352 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/071352
CMOS delay circuit Apr 29, 1998 Issued
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