Search

Toan V. Tran

Examiner (ID: 12257)

Most Active Art Unit
2816
Art Unit(s)
2504, 2816, 2899, 3621
Total Applications
1179
Issued Applications
1083
Pending Applications
23
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6837468 [patent_doc_number] => 20030034808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Drive circuit' [patent_app_type] => new [patent_app_number] => 10/216063 [patent_app_country] => US [patent_app_date] => 2002-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6222 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034808.pdf [firstpage_image] =>[orig_patent_app_number] => 10216063 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/216063
Drive circuit Aug 7, 2002 Issued
Array ( [id] => 1241664 [patent_doc_number] => 06683487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Current driver circuit for supplying write current to a write head while changing a flow direction of the write current' [patent_app_type] => B2 [patent_app_number] => 10/212702 [patent_app_country] => US [patent_app_date] => 2002-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7952 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683487.pdf [firstpage_image] =>[orig_patent_app_number] => 10212702 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212702
Current driver circuit for supplying write current to a write head while changing a flow direction of the write current Aug 6, 2002 Issued
Array ( [id] => 1354449 [patent_doc_number] => 06583658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Balanced circuit arrangement' [patent_app_type] => B1 [patent_app_number] => 10/203160 [patent_app_country] => US [patent_app_date] => 2002-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1618 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/583/06583658.pdf [firstpage_image] =>[orig_patent_app_number] => 10203160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/203160
Balanced circuit arrangement Aug 5, 2002 Issued
Array ( [id] => 1331823 [patent_doc_number] => 06600358 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Elimination of current drain in step-up level shifter when low power domain is off' [patent_app_type] => B1 [patent_app_number] => 10/210940 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 2306 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600358.pdf [firstpage_image] =>[orig_patent_app_number] => 10210940 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/210940
Elimination of current drain in step-up level shifter when low power domain is off Aug 1, 2002 Issued
Array ( [id] => 1407148 [patent_doc_number] => 06542018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Current mode step attenuation control circuit with digital technology' [patent_app_type] => B1 [patent_app_number] => 10/206560 [patent_app_country] => US [patent_app_date] => 2002-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8020 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542018.pdf [firstpage_image] =>[orig_patent_app_number] => 10206560 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/206560
Current mode step attenuation control circuit with digital technology Jul 25, 2002 Issued
Array ( [id] => 7632520 [patent_doc_number] => 06664814 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Output driver for an integrated circuit' [patent_app_type] => B1 [patent_app_number] => 10/199749 [patent_app_country] => US [patent_app_date] => 2002-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2466 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664814.pdf [firstpage_image] =>[orig_patent_app_number] => 10199749 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/199749
Output driver for an integrated circuit Jul 17, 2002 Issued
Array ( [id] => 6837467 [patent_doc_number] => 20030034807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Output driver devices' [patent_app_type] => new [patent_app_number] => 10/198191 [patent_app_country] => US [patent_app_date] => 2002-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4074 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034807.pdf [firstpage_image] =>[orig_patent_app_number] => 10198191 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/198191
Output driver devices Jul 16, 2002 Issued
Array ( [id] => 1342238 [patent_doc_number] => 06593798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'Voltage follower and related method of regulation' [patent_app_type] => B2 [patent_app_number] => 10/190913 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2096 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593798.pdf [firstpage_image] =>[orig_patent_app_number] => 10190913 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190913
Voltage follower and related method of regulation Jul 7, 2002 Issued
Array ( [id] => 6753848 [patent_doc_number] => 20030001624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Method and input circuit for evaluating a data signal at an input of a memory component' [patent_app_type] => new [patent_app_number] => 10/186650 [patent_app_country] => US [patent_app_date] => 2002-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2755 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20030001624.pdf [firstpage_image] =>[orig_patent_app_number] => 10186650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/186650
Method and input circuit for evaluating a data signal at an input of a memory component Jun 30, 2002 Issued
Array ( [id] => 1353992 [patent_doc_number] => 06580298 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Three input sense amplifier and method of operation' [patent_app_type] => B1 [patent_app_number] => 10/186363 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7835 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580298.pdf [firstpage_image] =>[orig_patent_app_number] => 10186363 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/186363
Three input sense amplifier and method of operation Jun 27, 2002 Issued
Array ( [id] => 1301130 [patent_doc_number] => 06628147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Comparator having reduced sensitivity to offset voltage and timing errors' [patent_app_type] => B2 [patent_app_number] => 10/185129 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3917 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/628/06628147.pdf [firstpage_image] =>[orig_patent_app_number] => 10185129 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185129
Comparator having reduced sensitivity to offset voltage and timing errors Jun 26, 2002 Issued
Array ( [id] => 1354143 [patent_doc_number] => 06580308 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'VDS protection for high voltage swing applications' [patent_app_type] => B1 [patent_app_number] => 10/185366 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3346 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580308.pdf [firstpage_image] =>[orig_patent_app_number] => 10185366 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185366
VDS protection for high voltage swing applications Jun 26, 2002 Issued
Array ( [id] => 1354134 [patent_doc_number] => 06580307 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Level shift circuit without junction breakdown of transistors' [patent_app_type] => B1 [patent_app_number] => 10/064257 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3658 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580307.pdf [firstpage_image] =>[orig_patent_app_number] => 10064257 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064257
Level shift circuit without junction breakdown of transistors Jun 25, 2002 Issued
Array ( [id] => 6045010 [patent_doc_number] => 20020167340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Sense amplifier having reduced Vt mismatch in input matched differential pair' [patent_app_type] => new [patent_app_number] => 10/183586 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3137 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20020167340.pdf [firstpage_image] =>[orig_patent_app_number] => 10183586 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183586
Sense amplifier having reduced Vt mismatch in input matched differential pair Jun 25, 2002 Issued
Array ( [id] => 6772723 [patent_doc_number] => 20030016061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Differential pair with high output signal crossover' [patent_app_type] => new [patent_app_number] => 10/183255 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2285 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20030016061.pdf [firstpage_image] =>[orig_patent_app_number] => 10183255 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183255
Differential pair with high output signal crossover Jun 25, 2002 Issued
Array ( [id] => 1377910 [patent_doc_number] => 06566926 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Hysteretic self-biased amplifier' [patent_app_type] => B1 [patent_app_number] => 10/179003 [patent_app_country] => US [patent_app_date] => 2002-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3891 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566926.pdf [firstpage_image] =>[orig_patent_app_number] => 10179003 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/179003
Hysteretic self-biased amplifier Jun 24, 2002 Issued
Array ( [id] => 1399616 [patent_doc_number] => 06549060 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Dynamic logic MUX' [patent_app_type] => B1 [patent_app_number] => 10/177868 [patent_app_country] => US [patent_app_date] => 2002-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549060.pdf [firstpage_image] =>[orig_patent_app_number] => 10177868 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/177868
Dynamic logic MUX Jun 18, 2002 Issued
Array ( [id] => 6777036 [patent_doc_number] => 20030048116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'DRIVING CONTROL DEVICE, POWER CONVERTING DEVICE, METHOD OF CONTROLLING POWER CONVERTING DEVICE AND METHOD OF USING POWER CONVERTING DEVICE' [patent_app_type] => new [patent_app_number] => 10/173673 [patent_app_country] => US [patent_app_date] => 2002-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4850 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20030048116.pdf [firstpage_image] =>[orig_patent_app_number] => 10173673 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/173673
Driving control device, power converting device, method of controlling power converting device and method of using power converting device Jun 18, 2002 Issued
Array ( [id] => 1342229 [patent_doc_number] => 06593797 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-15 [patent_title] => 'High-frequency integrated transistor module' [patent_app_type] => B1 [patent_app_number] => 10/174317 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1379 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593797.pdf [firstpage_image] =>[orig_patent_app_number] => 10174317 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/174317
High-frequency integrated transistor module Jun 17, 2002 Issued
Array ( [id] => 7634145 [patent_doc_number] => 06657475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'DC voltage bus clamp' [patent_app_type] => B1 [patent_app_number] => 10/175606 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2632 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/657/06657475.pdf [firstpage_image] =>[orig_patent_app_number] => 10175606 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175606
DC voltage bus clamp Jun 17, 2002 Issued
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