Toan V. Tran

Array ( [id] => 1553776 [patent_doc_number] => 06400193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'High speed, high current and low power consumption output circuit' [patent_app_type] => B1 [patent_app_number] => 09/860180 [patent_app_country] => US [patent_app_date] => 2001-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5301 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/400/06400193.pdf [firstpage_image] =>[orig_patent_app_number] => 09860180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1548199 [patent_doc_number] => 06445216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Sense amplifier having reduced Vt mismatch in input matched differential pair' [patent_app_type] => B1 [patent_app_number] => 09/855910 [patent_app_country] => US [patent_app_date] => 2001-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3093 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445216.pdf [firstpage_image] =>[orig_patent_app_number] => 09855910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1603432 [patent_doc_number] => 06433614 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'MOSFET-based switch' [patent_app_type] => B1 [patent_app_number] => 09/853356 [patent_app_country] => US [patent_app_date] => 2001-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3923 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/433/06433614.pdf [firstpage_image] =>[orig_patent_app_number] => 09853356 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5798463 [patent_doc_number] => 20020008251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-24 [patent_title] => 'Output stage for high-speed comparator circuits' [patent_app_type] => new [patent_app_number] => 09/826776 [patent_app_country] => US [patent_app_date] => 2001-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20020008251.pdf [firstpage_image] =>[orig_patent_app_number] => 09826776 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1413391 [patent_doc_number] => 06535032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-18 [patent_title] => 'Data receiver technology' [patent_app_type] => B2 [patent_app_number] => 09/843313 [patent_app_country] => US [patent_app_date] => 2001-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4361 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535032.pdf [firstpage_image] =>[orig_patent_app_number] => 09843313 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6907712 [patent_doc_number] => 20010010479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-02 [patent_title] => 'Integrated circuit having a comparator circuit including at least one differential amplifier' [patent_app_type] => new [patent_app_number] => 09/824221 [patent_app_country] => US [patent_app_date] => 2001-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9349 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20010010479.pdf [firstpage_image] =>[orig_patent_app_number] => 09824221 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1597837 [patent_doc_number] => 06384645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Integrated generator of a slow voltage ramp' [patent_app_type] => B2 [patent_app_number] => 09/824534 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384645.pdf [firstpage_image] =>[orig_patent_app_number] => 09824534 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7639607 [patent_doc_number] => 06396309 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Clocked sense amplifier flip flop with keepers to prevent floating nodes' [patent_app_type] => B1 [patent_app_number] => 09/824601 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3605 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396309.pdf [firstpage_image] =>[orig_patent_app_number] => 09824601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1479174 [patent_doc_number] => 06344761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-02-05 [patent_title] => 'Current comparison type latch' [patent_app_type] => B2 [patent_app_number] => 09/819646 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5245 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 400 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344761.pdf [firstpage_image] =>[orig_patent_app_number] => 09819646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1544980 [patent_doc_number] => 06373320 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Circuit configuration for operating point stabilization of a transistor' [patent_app_type] => B1 [patent_app_number] => 09/822033 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3176 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373320.pdf [firstpage_image] =>[orig_patent_app_number] => 09822033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1544973 [patent_doc_number] => 06373318 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Electronic switching device having at least two semiconductor components' [patent_app_type] => B1 [patent_app_number] => 09/817574 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7639 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373318.pdf [firstpage_image] =>[orig_patent_app_number] => 09817574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1597923 [patent_doc_number] => 06384666 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Antifuse latch device with controlled current programming and variable trip point' [patent_app_type] => B1 [patent_app_number] => 09/816030 [patent_app_country] => US [patent_app_date] => 2001-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6577 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384666.pdf [firstpage_image] =>[orig_patent_app_number] => 09816030 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1522612 [patent_doc_number] => 06414524 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Digital output buffer for MOSFET device' [patent_app_type] => B1 [patent_app_number] => 09/812517 [patent_app_country] => US [patent_app_date] => 2001-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3244 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/414/06414524.pdf [firstpage_image] =>[orig_patent_app_number] => 09812517 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6907707 [patent_doc_number] => 20010010474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-02 [patent_title] => 'Apparatus and method for an improved master-slave flip-flop with non-overlapping clocks' [patent_app_type] => new [patent_app_number] => 09/812046 [patent_app_country] => US [patent_app_date] => 2001-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3103 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20010010474.pdf [firstpage_image] =>[orig_patent_app_number] => 09812046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1436976 [patent_doc_number] => 06356121 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Very low-power comparison device' [patent_app_type] => B1 [patent_app_number] => 09/808744 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3929 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356121.pdf [firstpage_image] =>[orig_patent_app_number] => 09808744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5840963 [patent_doc_number] => 20020130690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Programmable dual drive strength output buffer with a shared boot circuit' [patent_app_type] => new [patent_app_number] => 09/808739 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6526 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20020130690.pdf [firstpage_image] =>[orig_patent_app_number] => 09808739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6895380 [patent_doc_number] => 20010026170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Electronic circuit provided with a digital driver for driving a capacitive load' [patent_app_type] => new [patent_app_number] => 09/808276 [patent_app_country] => US [patent_app_date] => 2001-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2726 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026170.pdf [firstpage_image] =>[orig_patent_app_number] => 09808276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1530036 [patent_doc_number] => 06480044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-12 [patent_title] => 'Semiconductor circuit configuration' [patent_app_type] => B2 [patent_app_number] => 09/804322 [patent_app_country] => US [patent_app_date] => 2001-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3609 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480044.pdf [firstpage_image] =>[orig_patent_app_number] => 09804322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6417911 [patent_doc_number] => 20020125919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Switching circuit utilizing a high voltage transistor protection technique for integrated circuit devices incorporating dual supply voltage sources' [patent_app_type] => new [patent_app_number] => 09/803318 [patent_app_country] => US [patent_app_date] => 2001-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2242 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20020125919.pdf [firstpage_image] =>[orig_patent_app_number] => 09803318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1597911 [patent_doc_number] => 06384663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Circuit for high precision detection of the time of arrival of photons falling on single photon avalanche diodes' [patent_app_type] => B2 [patent_app_number] => 09/798060 [patent_app_country] => US [patent_app_date] => 2001-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6211 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384663.pdf [firstpage_image] =>[orig_patent_app_number] => 09798060 [rel_patent_id] =>[rel_patent_doc_number] =>)