
Todd Deboer
Examiner (ID: 6892)
| Most Active Art Unit | 2104 |
| Art Unit(s) | 2104, 2101, 2819, 2106, 2899 |
| Total Applications | 968 |
| Issued Applications | 785 |
| Pending Applications | 5 |
| Abandoned Applications | 178 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3715013
[patent_doc_number] => 05654863
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => 'Integrated circuit having a gate oxide'
[patent_app_type] => 1
[patent_app_number] => 8/744684
[patent_app_country] => US
[patent_app_date] => 1996-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 949
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/654/05654863.pdf
[firstpage_image] =>[orig_patent_app_number] => 744684
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/744684 | Integrated circuit having a gate oxide | Nov 6, 1996 | Issued |
Array
(
[id] => 3714999
[patent_doc_number] => 05654862
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => 'Method and apparatus for coupling multiple independent on-chip V.sub.dd busses to an ESD core clamp'
[patent_app_type] => 1
[patent_app_number] => 8/732752
[patent_app_country] => US
[patent_app_date] => 1996-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3582
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/654/05654862.pdf
[firstpage_image] =>[orig_patent_app_number] => 732752
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/732752 | Method and apparatus for coupling multiple independent on-chip V.sub.dd busses to an ESD core clamp | Oct 17, 1996 | Issued |
Array
(
[id] => 3697156
[patent_doc_number] => 05663864
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-02
[patent_title] => 'Surge absorber'
[patent_app_type] => 1
[patent_app_number] => 8/693675
[patent_app_country] => US
[patent_app_date] => 1996-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3745
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/663/05663864.pdf
[firstpage_image] =>[orig_patent_app_number] => 693675
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/693675 | Surge absorber | Aug 12, 1996 | Issued |
Array
(
[id] => 3705977
[patent_doc_number] => 05677820
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Telephone and communications line overvoltage protection apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/683695
[patent_app_country] => US
[patent_app_date] => 1996-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1102
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/677/05677820.pdf
[firstpage_image] =>[orig_patent_app_number] => 683695
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/683695 | Telephone and communications line overvoltage protection apparatus | Jul 17, 1996 | Issued |
Array
(
[id] => 3805103
[patent_doc_number] => 05828324
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-27
[patent_title] => 'Match and match address signal generation in a content addressable memory encoder'
[patent_app_type] => 1
[patent_app_number] => 8/664902
[patent_app_country] => US
[patent_app_date] => 1996-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3388
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/828/05828324.pdf
[firstpage_image] =>[orig_patent_app_number] => 664902
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/664902 | Match and match address signal generation in a content addressable memory encoder | Jun 16, 1996 | Issued |
Array
(
[id] => 3712602
[patent_doc_number] => 05654703
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => 'Parallel data compression and decompression'
[patent_app_type] => 1
[patent_app_number] => 8/664901
[patent_app_country] => US
[patent_app_date] => 1996-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3937
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/654/05654703.pdf
[firstpage_image] =>[orig_patent_app_number] => 664901
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/664901 | Parallel data compression and decompression | Jun 16, 1996 | Issued |
Array
(
[id] => 3654232
[patent_doc_number] => 05638071
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-10
[patent_title] => 'Efficient architecture for correcting component mismatches and circuit nonlinearities in A/D converters'
[patent_app_type] => 1
[patent_app_number] => 8/662273
[patent_app_country] => US
[patent_app_date] => 1996-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 34
[patent_no_of_words] => 6815
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 270
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/638/05638071.pdf
[firstpage_image] =>[orig_patent_app_number] => 662273
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/662273 | Efficient architecture for correcting component mismatches and circuit nonlinearities in A/D converters | Jun 11, 1996 | Issued |
Array
(
[id] => 3673040
[patent_doc_number] => 05598311
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-28
[patent_title] => 'D.C. breaker arc extinguishing circuit'
[patent_app_type] => 1
[patent_app_number] => 8/639894
[patent_app_country] => US
[patent_app_date] => 1996-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 808
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/598/05598311.pdf
[firstpage_image] =>[orig_patent_app_number] => 639894
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/639894 | D.C. breaker arc extinguishing circuit | Apr 25, 1996 | Issued |
| 08/638055 | FOR PROTECTING TELECOMMUNICATIONS EQUIPMENT FROM VOLTAGE TRANSIENTS | Apr 24, 1996 | Abandoned |
Array
(
[id] => 3635262
[patent_doc_number] => 05621602
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Surge protector'
[patent_app_type] => 1
[patent_app_number] => 8/637827
[patent_app_country] => US
[patent_app_date] => 1996-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 3025
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/621/05621602.pdf
[firstpage_image] =>[orig_patent_app_number] => 637827
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/637827 | Surge protector | Apr 24, 1996 | Issued |
Array
(
[id] => 3708541
[patent_doc_number] => 05646622
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Analog/digital converter'
[patent_app_type] => 1
[patent_app_number] => 8/631804
[patent_app_country] => US
[patent_app_date] => 1996-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 14
[patent_no_of_words] => 3042
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/646/05646622.pdf
[firstpage_image] =>[orig_patent_app_number] => 631804
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/631804 | Analog/digital converter | Apr 10, 1996 | Issued |
Array
(
[id] => 3695105
[patent_doc_number] => 05663724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-02
[patent_title] => '16B/20B encoder'
[patent_app_type] => 1
[patent_app_number] => 8/623400
[patent_app_country] => US
[patent_app_date] => 1996-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7055
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 266
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/663/05663724.pdf
[firstpage_image] =>[orig_patent_app_number] => 623400
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/623400 | 16B/20B encoder | Mar 27, 1996 | Issued |
Array
(
[id] => 3729141
[patent_doc_number] => 05682153
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-28
[patent_title] => 'Adjust bit determining circuit'
[patent_app_type] => 1
[patent_app_number] => 8/622007
[patent_app_country] => US
[patent_app_date] => 1996-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10748
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/682/05682153.pdf
[firstpage_image] =>[orig_patent_app_number] => 622007
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/622007 | Adjust bit determining circuit | Mar 25, 1996 | Issued |
Array
(
[id] => 3702320
[patent_doc_number] => 05650904
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Fault tolerant thermoelectric device circuit'
[patent_app_type] => 1
[patent_app_number] => 8/618403
[patent_app_country] => US
[patent_app_date] => 1996-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 5353
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/650/05650904.pdf
[firstpage_image] =>[orig_patent_app_number] => 618403
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/618403 | Fault tolerant thermoelectric device circuit | Mar 18, 1996 | Issued |
Array
(
[id] => 3666929
[patent_doc_number] => 05627716
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-06
[patent_title] => 'Overcurrent protection device'
[patent_app_type] => 1
[patent_app_number] => 8/610679
[patent_app_country] => US
[patent_app_date] => 1996-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 82
[patent_figures_cnt] => 132
[patent_no_of_words] => 84626
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/627/05627716.pdf
[firstpage_image] =>[orig_patent_app_number] => 610679
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/610679 | Overcurrent protection device | Mar 4, 1996 | Issued |
Array
(
[id] => 3709784
[patent_doc_number] => 05675336
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-07
[patent_title] => 'Analog memory unit'
[patent_app_type] => 1
[patent_app_number] => 8/601409
[patent_app_country] => US
[patent_app_date] => 1996-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2791
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/675/05675336.pdf
[firstpage_image] =>[orig_patent_app_number] => 601409
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/601409 | Analog memory unit | Feb 14, 1996 | Issued |
Array
(
[id] => 3732768
[patent_doc_number] => 05701226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Apparatus and method for distributing electrical power'
[patent_app_type] => 1
[patent_app_number] => 8/593213
[patent_app_country] => US
[patent_app_date] => 1996-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 4534
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/701/05701226.pdf
[firstpage_image] =>[orig_patent_app_number] => 593213
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/593213 | Apparatus and method for distributing electrical power | Jan 28, 1996 | Issued |
Array
(
[id] => 3671022
[patent_doc_number] => 05668548
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-16
[patent_title] => 'High performance variable length decoder with enhanced throughput due to tagging of the input bit stream and parallel processing of contiguous code words'
[patent_app_type] => 1
[patent_app_number] => 8/580405
[patent_app_country] => US
[patent_app_date] => 1995-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 7910
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/668/05668548.pdf
[firstpage_image] =>[orig_patent_app_number] => 580405
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/580405 | High performance variable length decoder with enhanced throughput due to tagging of the input bit stream and parallel processing of contiguous code words | Dec 27, 1995 | Issued |
Array
(
[id] => 3709682
[patent_doc_number] => 05675331
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-07
[patent_title] => 'Decoding device for decoding a variety of code signals'
[patent_app_type] => 1
[patent_app_number] => 8/572100
[patent_app_country] => US
[patent_app_date] => 1995-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 9982
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/675/05675331.pdf
[firstpage_image] =>[orig_patent_app_number] => 572100
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/572100 | Decoding device for decoding a variety of code signals | Dec 13, 1995 | Issued |
Array
(
[id] => 3556722
[patent_doc_number] => 05546260
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-13
[patent_title] => 'Protection circuit used for deactivating a transistor during a short-circuit having an inductive component'
[patent_app_type] => 1
[patent_app_number] => 8/550523
[patent_app_country] => US
[patent_app_date] => 1995-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4333
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 283
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/546/05546260.pdf
[firstpage_image] =>[orig_patent_app_number] => 550523
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/550523 | Protection circuit used for deactivating a transistor during a short-circuit having an inductive component | Oct 29, 1995 | Issued |