Tom Thomas

Array ( [id] => 3107197 [patent_doc_number] => 05407855 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-18 [patent_title] => 'Process for forming a semiconductor device having a reducing/oxidizing conductive material' [patent_app_type] => 1 [patent_app_number] => 8/072012 [patent_app_country] => US [patent_app_date] => 1993-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 5654 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/407/05407855.pdf [firstpage_image] =>[orig_patent_app_number] => 072012 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3064403 [patent_doc_number] => 05352620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-04 [patent_title] => 'Method of making semiconductor device with memory cells and peripheral transistors' [patent_app_type] => 1 [patent_app_number] => 8/071343 [patent_app_country] => US [patent_app_date] => 1993-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 8100 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/352/05352620.pdf [firstpage_image] =>[orig_patent_app_number] => 071343 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3026782 [patent_doc_number] => 05348895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-20 [patent_title] => 'LDMOS transistor with self-aligned source/backgate and photo-aligned gate' [patent_app_type] => 1 [patent_app_number] => 8/071156 [patent_app_country] => US [patent_app_date] => 1993-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 4966 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/348/05348895.pdf [firstpage_image] =>[orig_patent_app_number] => 071156 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3459655 [patent_doc_number] => 05382566 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-17 [patent_title] => 'Josephson junction device formed of oxide superconductor and process for preparing the same' [patent_app_type] => 1 [patent_app_number] => 8/069912 [patent_app_country] => US [patent_app_date] => 1993-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3438 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/382/05382566.pdf [firstpage_image] =>[orig_patent_app_number] => 069912 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3049637 [patent_doc_number] => 05306658 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Method of making virtual ground memory cell array' [patent_app_type] => 1 [patent_app_number] => 8/068472 [patent_app_country] => US [patent_app_date] => 1993-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3994 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/306/05306658.pdf [firstpage_image] =>[orig_patent_app_number] => 068472 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3477039 [patent_doc_number] => 05425392 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-20 [patent_title] => 'Method DRAM polycide rowline formation' [patent_app_type] => 1 [patent_app_number] => 8/067660 [patent_app_country] => US [patent_app_date] => 1993-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2311 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/425/05425392.pdf [firstpage_image] =>[orig_patent_app_number] => 067660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3564897 [patent_doc_number] => 05482880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-09 [patent_title] => 'Non-volatile memory cell and fabrication method' [patent_app_type] => 1 [patent_app_number] => 8/066816 [patent_app_country] => US [patent_app_date] => 1993-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 3224 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/482/05482880.pdf [firstpage_image] =>[orig_patent_app_number] => 066816 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3007325 [patent_doc_number] => 05275964 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Method for compactly laying out a pair of transistors' [patent_app_type] => 1 [patent_app_number] => 8/064994 [patent_app_country] => US [patent_app_date] => 1993-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4988 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/275/05275964.pdf [firstpage_image] =>[orig_patent_app_number] => 064994 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3012471 [patent_doc_number] => 05332695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'Method of manufacturing semi conductor device mounted on a heat sink' [patent_app_type] => 1 [patent_app_number] => 8/065761 [patent_app_country] => US [patent_app_date] => 1993-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 5429 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/332/05332695.pdf [firstpage_image] =>[orig_patent_app_number] => 065761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3004527 [patent_doc_number] => 05374578 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Ozone gas processing for ferroelectric memory circuits' [patent_app_type] => 1 [patent_app_number] => 8/064746 [patent_app_country] => US [patent_app_date] => 1993-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3088 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/374/05374578.pdf [firstpage_image] =>[orig_patent_app_number] => 064746 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3453860 [patent_doc_number] => 05378645 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-03 [patent_title] => 'Method of making a semiconductor device with a capacitor' [patent_app_type] => 1 [patent_app_number] => 8/062752 [patent_app_country] => US [patent_app_date] => 1993-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1536 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/378/05378645.pdf [firstpage_image] =>[orig_patent_app_number] => 062752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3017298 [patent_doc_number] => 05302542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Method of making a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/056900 [patent_app_country] => US [patent_app_date] => 1993-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2669 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/302/05302542.pdf [firstpage_image] =>[orig_patent_app_number] => 056900 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3086101 [patent_doc_number] => 05278091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-11 [patent_title] => 'Process to manufacture crown stacked capacitor structures with HSG-rugged polysilicon on all sides of the storage node' [patent_app_type] => 1 [patent_app_number] => 8/058554 [patent_app_country] => US [patent_app_date] => 1993-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2843 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/278/05278091.pdf [firstpage_image] =>[orig_patent_app_number] => 058554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3424703 [patent_doc_number] => 05422294 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-06 [patent_title] => 'Method of making a trench capacitor field shield with sidewall contact' [patent_app_type] => 1 [patent_app_number] => 8/056090 [patent_app_country] => US [patent_app_date] => 1993-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 37 [patent_no_of_words] => 7160 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/422/05422294.pdf [firstpage_image] =>[orig_patent_app_number] => 056090 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2996561 [patent_doc_number] => 05358889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-25 [patent_title] => 'Formation of ruthenium oxide for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/053755 [patent_app_country] => US [patent_app_date] => 1993-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2529 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/358/05358889.pdf [firstpage_image] =>[orig_patent_app_number] => 053755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3017697 [patent_doc_number] => 05288655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-22 [patent_title] => 'Method of making dynamic random access memory having a reliable contact' [patent_app_type] => 1 [patent_app_number] => 8/049326 [patent_app_country] => US [patent_app_date] => 1993-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5476 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 541 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/288/05288655.pdf [firstpage_image] =>[orig_patent_app_number] => 049326 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3090996 [patent_doc_number] => 05312769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Method of making a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/047110 [patent_app_country] => US [patent_app_date] => 1993-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 3862 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/312/05312769.pdf [firstpage_image] =>[orig_patent_app_number] => 047110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3020472 [patent_doc_number] => 05348558 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-20 [patent_title] => 'Layout pattern generating apparatus' [patent_app_type] => 1 [patent_app_number] => 8/046610 [patent_app_country] => US [patent_app_date] => 1993-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 24 [patent_no_of_words] => 9132 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/348/05348558.pdf [firstpage_image] =>[orig_patent_app_number] => 046610 [rel_patent_id] =>[rel_patent_doc_number] =>)