Search

Tom Thomas

Supervisory Patent Examiner (ID: 139, Phone: (571)272-1664 , Office: P/2893 )

Most Active Art Unit
1104
Art Unit(s)
2899, 1104, 2893, 2811
Total Applications
746
Issued Applications
628
Pending Applications
6
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5113119 [patent_doc_number] => 20070197034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Semiconductor device having a sac through-hole' [patent_app_type] => utility [patent_app_number] => 11/700767 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4542 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20070197034.pdf [firstpage_image] =>[orig_patent_app_number] => 11700767 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/700767
Semiconductor device having a sac through-hole Jan 31, 2007 Abandoned
Array ( [id] => 4913078 [patent_doc_number] => 20080093677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/616947 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5352 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20080093677.pdf [firstpage_image] =>[orig_patent_app_number] => 11616947 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/616947
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME Dec 27, 2006 Abandoned
Array ( [id] => 5219856 [patent_doc_number] => 20070161167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Fabrication method of display device' [patent_app_type] => utility [patent_app_number] => 11/600727 [patent_app_country] => US [patent_app_date] => 2006-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3476 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20070161167.pdf [firstpage_image] =>[orig_patent_app_number] => 11600727 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/600727
Fabrication method of display device Nov 16, 2006 Abandoned
Array ( [id] => 3645940 [patent_doc_number] => 05637526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Method of making a capacitor in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/549572 [patent_app_country] => US [patent_app_date] => 1995-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2308 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/637/05637526.pdf [firstpage_image] =>[orig_patent_app_number] => 549572 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/549572
Method of making a capacitor in a semiconductor device Oct 26, 1995 Issued
Array ( [id] => 3687474 [patent_doc_number] => 05691227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Method for forming charge storage electrodes of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/512772 [patent_app_country] => US [patent_app_date] => 1995-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 1702 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691227.pdf [firstpage_image] =>[orig_patent_app_number] => 512772 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512772
Method for forming charge storage electrodes of semiconductor device Aug 8, 1995 Issued
08/507948 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Jul 26, 1995 Abandoned
Array ( [id] => 3524529 [patent_doc_number] => 05504030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-02 [patent_title] => 'Process for fabricating high-density mask ROM devices' [patent_app_type] => 1 [patent_app_number] => 8/505050 [patent_app_country] => US [patent_app_date] => 1995-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 4279 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/504/05504030.pdf [firstpage_image] =>[orig_patent_app_number] => 505050 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/505050
Process for fabricating high-density mask ROM devices Jul 20, 1995 Issued
Array ( [id] => 3730017 [patent_doc_number] => 05635421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Method of making a precision capacitor array' [patent_app_type] => 1 [patent_app_number] => 8/490856 [patent_app_country] => US [patent_app_date] => 1995-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2055 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/635/05635421.pdf [firstpage_image] =>[orig_patent_app_number] => 490856 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/490856
Method of making a precision capacitor array Jun 14, 1995 Issued
08/475237 MECHANICAL SUPPORTS FOR VERY THIN STACKED CAPACITOR PLATES Jun 6, 1995 Abandoned
Array ( [id] => 3532854 [patent_doc_number] => 05556802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Method of making corrugated vertical stack capacitor (CVSTC)' [patent_app_type] => 1 [patent_app_number] => 8/486630 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2467 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/556/05556802.pdf [firstpage_image] =>[orig_patent_app_number] => 486630 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486630
Method of making corrugated vertical stack capacitor (CVSTC) Jun 6, 1995 Issued
Array ( [id] => 3493576 [patent_doc_number] => 05508219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-16 [patent_title] => 'SOI DRAM with field-shield isolation and body contact' [patent_app_type] => 1 [patent_app_number] => 8/461958 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2838 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/508/05508219.pdf [firstpage_image] =>[orig_patent_app_number] => 461958 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/461958
SOI DRAM with field-shield isolation and body contact Jun 4, 1995 Issued
Array ( [id] => 3561109 [patent_doc_number] => 05525531 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'SOI DRAM with field-shield isolation' [patent_app_type] => 1 [patent_app_number] => 8/461815 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2840 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/525/05525531.pdf [firstpage_image] =>[orig_patent_app_number] => 461815 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/461815
SOI DRAM with field-shield isolation Jun 4, 1995 Issued
Array ( [id] => 3607980 [patent_doc_number] => 05589412 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Method of making increased-density flash EPROM that utilizes a series of planarized, self-aligned, intermediate strips of conductive material to contact the drain regions' [patent_app_type] => 1 [patent_app_number] => 8/456548 [patent_app_country] => US [patent_app_date] => 1995-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 7733 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 594 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/589/05589412.pdf [firstpage_image] =>[orig_patent_app_number] => 456548 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/456548
Method of making increased-density flash EPROM that utilizes a series of planarized, self-aligned, intermediate strips of conductive material to contact the drain regions May 31, 1995 Issued
Array ( [id] => 3505206 [patent_doc_number] => 05514628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-07 [patent_title] => 'Two-step sinter method utilized in conjunction with memory cell replacement by redundancies' [patent_app_type] => 1 [patent_app_number] => 8/451644 [patent_app_country] => US [patent_app_date] => 1995-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3277 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/514/05514628.pdf [firstpage_image] =>[orig_patent_app_number] => 451644 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/451644
Two-step sinter method utilized in conjunction with memory cell replacement by redundancies May 25, 1995 Issued
Array ( [id] => 3581525 [patent_doc_number] => 05580812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Semiconductor device have a belt cover film' [patent_app_type] => 1 [patent_app_number] => 8/451216 [patent_app_country] => US [patent_app_date] => 1995-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 38 [patent_no_of_words] => 6154 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/580/05580812.pdf [firstpage_image] =>[orig_patent_app_number] => 451216 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/451216
Semiconductor device have a belt cover film May 25, 1995 Issued
Array ( [id] => 3588753 [patent_doc_number] => 05585297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Method of manufacture of multi-state mask ROM and multi-state mask ROM device produced thereby' [patent_app_type] => 1 [patent_app_number] => 8/450298 [patent_app_country] => US [patent_app_date] => 1995-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3074 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/585/05585297.pdf [firstpage_image] =>[orig_patent_app_number] => 450298 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/450298
Method of manufacture of multi-state mask ROM and multi-state mask ROM device produced thereby May 24, 1995 Issued
Array ( [id] => 3622256 [patent_doc_number] => 05602048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'Semiconductor integrated circuit device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/443036 [patent_app_country] => US [patent_app_date] => 1995-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 32 [patent_no_of_words] => 8262 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/602/05602048.pdf [firstpage_image] =>[orig_patent_app_number] => 443036 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/443036
Semiconductor integrated circuit device and method of manufacturing the same May 16, 1995 Issued
Array ( [id] => 3517456 [patent_doc_number] => 05506162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-09 [patent_title] => 'Method of producing a semiconductor integrated circuit device using a master slice approach' [patent_app_type] => 1 [patent_app_number] => 8/441011 [patent_app_country] => US [patent_app_date] => 1995-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 72 [patent_no_of_words] => 10418 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/506/05506162.pdf [firstpage_image] =>[orig_patent_app_number] => 441011 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/441011
Method of producing a semiconductor integrated circuit device using a master slice approach May 14, 1995 Issued
08/438813 SEMICONDUCTOR DEVICE WITH INCREASED ON CHIP DECOUPLING CAPACITANCE May 10, 1995 Abandoned
Array ( [id] => 3620530 [patent_doc_number] => 05641703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'Voltage programmable links for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/430303 [patent_app_country] => US [patent_app_date] => 1995-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5547 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/641/05641703.pdf [firstpage_image] =>[orig_patent_app_number] => 430303 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/430303
Voltage programmable links for integrated circuits Apr 27, 1995 Issued
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