
Tom Thomas
Supervisory Patent Examiner (ID: 139, Phone: (571)272-1664 , Office: P/2893 )
| Most Active Art Unit | 1104 |
| Art Unit(s) | 2899, 1104, 2893, 2811 |
| Total Applications | 746 |
| Issued Applications | 628 |
| Pending Applications | 6 |
| Abandoned Applications | 112 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2931648
[patent_doc_number] => 05196357
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-23
[patent_title] => 'Method of making extended polysilicon self-aligned gate overlapped lightly doped drain structure for submicron transistor'
[patent_app_type] => 1
[patent_app_number] => 7/793916
[patent_app_country] => US
[patent_app_date] => 1991-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2857
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 244
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/196/05196357.pdf
[firstpage_image] =>[orig_patent_app_number] => 793916
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/793916 | Method of making extended polysilicon self-aligned gate overlapped lightly doped drain structure for submicron transistor | Nov 17, 1991 | Issued |
Array
(
[id] => 2920920
[patent_doc_number] => 05200355
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-06
[patent_title] => 'Method for manufacturing a mask read only memory device'
[patent_app_type] => 1
[patent_app_number] => 7/792590
[patent_app_country] => US
[patent_app_date] => 1991-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 45
[patent_no_of_words] => 8335
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/200/05200355.pdf
[firstpage_image] =>[orig_patent_app_number] => 792590
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/792590 | Method for manufacturing a mask read only memory device | Nov 14, 1991 | Issued |
Array
(
[id] => 2829468
[patent_doc_number] => 05175118
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-29
[patent_title] => 'Multiple layer electrode structure for semiconductor device and method of manufacturing thereof'
[patent_app_type] => 1
[patent_app_number] => 7/787862
[patent_app_country] => US
[patent_app_date] => 1991-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 15
[patent_no_of_words] => 4784
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/175/05175118.pdf
[firstpage_image] =>[orig_patent_app_number] => 787862
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/787862 | Multiple layer electrode structure for semiconductor device and method of manufacturing thereof | Nov 4, 1991 | Issued |
Array
(
[id] => 2921000
[patent_doc_number] => 05192703
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-09
[patent_title] => 'Method of making tungsten contact core stack capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/786242
[patent_app_country] => US
[patent_app_date] => 1991-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 5251
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/192/05192703.pdf
[firstpage_image] =>[orig_patent_app_number] => 786242
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/786242 | Method of making tungsten contact core stack capacitor | Oct 30, 1991 | Issued |
Array
(
[id] => 2909990
[patent_doc_number] => 05236857
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-17
[patent_title] => 'Resistor structure and process'
[patent_app_type] => 1
[patent_app_number] => 7/785360
[patent_app_country] => US
[patent_app_date] => 1991-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1899
[patent_no_of_claims] => 20
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[pdf_file] => patents/05/236/05236857.pdf
[firstpage_image] =>[orig_patent_app_number] => 785360
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/785360 | Resistor structure and process | Oct 29, 1991 | Issued |
Array
(
[id] => 2852188
[patent_doc_number] => 05134086
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-28
[patent_title] => 'Method for manufacturing capacitor of highly integrated semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/784534
[patent_app_country] => US
[patent_app_date] => 1991-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4407
[patent_no_of_claims] => 23
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[pdf_file] => patents/05/134/05134086.pdf
[firstpage_image] =>[orig_patent_app_number] => 784534
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/784534 | Method for manufacturing capacitor of highly integrated semiconductor memory device | Oct 28, 1991 | Issued |
Array
(
[id] => 2784346
[patent_doc_number] => 05130267
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-14
[patent_title] => 'Split metal plate capacitor and method for making the same'
[patent_app_type] => 1
[patent_app_number] => 7/784097
[patent_app_country] => US
[patent_app_date] => 1991-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4475
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/130/05130267.pdf
[firstpage_image] =>[orig_patent_app_number] => 784097
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/784097 | Split metal plate capacitor and method for making the same | Oct 27, 1991 | Issued |
Array
(
[id] => 2883894
[patent_doc_number] => 05268322
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-07
[patent_title] => 'Method of making DRAM having a stacked capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/781404
[patent_app_country] => US
[patent_app_date] => 1991-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 23
[patent_no_of_words] => 4065
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 723
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/268/05268322.pdf
[firstpage_image] =>[orig_patent_app_number] => 781404
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/781404 | Method of making DRAM having a stacked capacitor | Oct 22, 1991 | Issued |
Array
(
[id] => 2931789
[patent_doc_number] => 05196365
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-23
[patent_title] => 'Method of making semiconductor memory device having stacked capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/779548
[patent_app_country] => US
[patent_app_date] => 1991-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/196/05196365.pdf
[firstpage_image] =>[orig_patent_app_number] => 779548
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/779548 | Method of making semiconductor memory device having stacked capacitor | Oct 17, 1991 | Issued |
Array
(
[id] => 2834206
[patent_doc_number] => 05120667
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-09
[patent_title] => 'Process for fabricating a thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 7/778750
[patent_app_country] => US
[patent_app_date] => 1991-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 2958
[patent_no_of_claims] => 14
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[pdf_file] => patents/05/120/05120667.pdf
[firstpage_image] =>[orig_patent_app_number] => 778750
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/778750 | Process for fabricating a thin film transistor | Oct 17, 1991 | Issued |
Array
(
[id] => 2782188
[patent_doc_number] => 05164327
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-17
[patent_title] => 'Method of manufacturing a mis-type semiconductor'
[patent_app_type] => 1
[patent_app_number] => 7/772856
[patent_app_country] => US
[patent_app_date] => 1991-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2005
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[pdf_file] => patents/05/164/05164327.pdf
[firstpage_image] =>[orig_patent_app_number] => 772856
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/772856 | Method of manufacturing a mis-type semiconductor | Oct 7, 1991 | Issued |
Array
(
[id] => 2948390
[patent_doc_number] => 05262342
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-16
[patent_title] => 'Method of making a semiconductor memory device having error checking/correcting functions'
[patent_app_type] => 1
[patent_app_number] => 7/771891
[patent_app_country] => US
[patent_app_date] => 1991-10-07
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[patent_drawing_sheets_cnt] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/262/05262342.pdf
[firstpage_image] =>[orig_patent_app_number] => 771891
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/771891 | Method of making a semiconductor memory device having error checking/correcting functions | Oct 6, 1991 | Issued |
Array
(
[id] => 2845889
[patent_doc_number] => 05110754
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-05
[patent_title] => 'Method of making a DRAM capacitor for use as an programmable antifuse for redundancy repair/options on a DRAM'
[patent_app_type] => 1
[patent_app_number] => 7/771688
[patent_app_country] => US
[patent_app_date] => 1991-10-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/110/05110754.pdf
[firstpage_image] =>[orig_patent_app_number] => 771688
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/771688 | Method of making a DRAM capacitor for use as an programmable antifuse for redundancy repair/options on a DRAM | Oct 3, 1991 | Issued |
Array
(
[id] => 2788410
[patent_doc_number] => 05135881
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-04
[patent_title] => 'Method of making random access memory device having memory cells each implemented by a stacked storage capacitor and a transfer transistor with lightly-doped drain structure'
[patent_app_type] => 1
[patent_app_number] => 7/766258
[patent_app_country] => US
[patent_app_date] => 1991-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 6620
[patent_no_of_claims] => 17
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[patent_words_short_claim] => 332
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/135/05135881.pdf
[firstpage_image] =>[orig_patent_app_number] => 766258
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/766258 | Method of making random access memory device having memory cells each implemented by a stacked storage capacitor and a transfer transistor with lightly-doped drain structure | Sep 26, 1991 | Issued |
| 07/765419 | HIGH DENSITY DYNAMIC RAM CELL | Sep 24, 1991 | Abandoned |
Array
(
[id] => 2823004
[patent_doc_number] => 05169796
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-08
[patent_title] => 'Process for fabricating self-aligned metal gate field effect transistors'
[patent_app_type] => 1
[patent_app_number] => 7/762612
[patent_app_country] => US
[patent_app_date] => 1991-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/169/05169796.pdf
[firstpage_image] =>[orig_patent_app_number] => 762612
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/762612 | Process for fabricating self-aligned metal gate field effect transistors | Sep 18, 1991 | Issued |
Array
(
[id] => 2877639
[patent_doc_number] => 05185284
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-02-09
[patent_title] => 'Method of making a semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/758146
[patent_app_country] => US
[patent_app_date] => 1991-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 4925
[patent_no_of_claims] => 10
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[pdf_file] => patents/05/185/05185284.pdf
[firstpage_image] =>[orig_patent_app_number] => 758146
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/758146 | Method of making a semiconductor memory device | Sep 11, 1991 | Issued |
Array
(
[id] => 2920878
[patent_doc_number] => 05200353
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-06
[patent_title] => 'Method of manufacturing a semiconductor device having trench capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/754296
[patent_app_country] => US
[patent_app_date] => 1991-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 6111
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[pdf_file] => patents/05/200/05200353.pdf
[firstpage_image] =>[orig_patent_app_number] => 754296
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/754296 | Method of manufacturing a semiconductor device having trench capacitor | Sep 3, 1991 | Issued |
| 07/751808 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | Aug 29, 1991 | Abandoned |
Array
(
[id] => 2961196
[patent_doc_number] => 05264384
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[patent_issue_date] => 1993-11-23
[patent_title] => 'Method of making a non-volatile memory cell'
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[patent_app_country] => US
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[pdf_file] => patents/05/264/05264384.pdf
[firstpage_image] =>[orig_patent_app_number] => 753252
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/753252 | Method of making a non-volatile memory cell | Aug 29, 1991 | Issued |