Tom Thomas

Array ( [id] => 2804954 [patent_doc_number] => 05156992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-20 [patent_title] => 'Process for forming poly-sheet pillar transistor DRAM cell' [patent_app_type] => 1 [patent_app_number] => 7/720542 [patent_app_country] => US [patent_app_date] => 1991-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 3983 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/156/05156992.pdf [firstpage_image] =>[orig_patent_app_number] => 720542 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2802614 [patent_doc_number] => 05145810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Fabrication process of semiconductor pressure sensor for sensing pressure applied' [patent_app_type] => 1 [patent_app_number] => 7/722558 [patent_app_country] => US [patent_app_date] => 1991-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 4446 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/145/05145810.pdf [firstpage_image] =>[orig_patent_app_number] => 722558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2783493 [patent_doc_number] => 05141889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-25 [patent_title] => 'Method of making enhanced insulated gate bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 7/715864 [patent_app_country] => US [patent_app_date] => 1991-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 2623 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/141/05141889.pdf [firstpage_image] =>[orig_patent_app_number] => 715864 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2875056 [patent_doc_number] => 05158905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-27 [patent_title] => 'Method for manufacturing a semiconductor device with villus-type capacitor' [patent_app_type] => 1 [patent_app_number] => 7/715796 [patent_app_country] => US [patent_app_date] => 1991-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2884 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/158/05158905.pdf [firstpage_image] =>[orig_patent_app_number] => 715796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2877536 [patent_doc_number] => 05185277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'Method for the making of a transistor gate' [patent_app_type] => 1 [patent_app_number] => 7/714230 [patent_app_country] => US [patent_app_date] => 1991-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 2104 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185277.pdf [firstpage_image] =>[orig_patent_app_number] => 714230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2857143 [patent_doc_number] => 05084405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-28 [patent_title] => 'Process to fabricate a double ring stacked cell structure' [patent_app_type] => 1 [patent_app_number] => 7/712308 [patent_app_country] => US [patent_app_date] => 1991-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2636 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/084/05084405.pdf [firstpage_image] =>[orig_patent_app_number] => 712308 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2781292 [patent_doc_number] => 05087577 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-11 [patent_title] => 'Manufacturing method for a power MISFET' [patent_app_type] => 1 [patent_app_number] => 7/710588 [patent_app_country] => US [patent_app_date] => 1991-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 1165 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/087/05087577.pdf [firstpage_image] =>[orig_patent_app_number] => 710588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2978682 [patent_doc_number] => 05204279 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-20 [patent_title] => 'Method of making SRAM cell and structure with polycrystalline p-channel load devices' [patent_app_type] => 1 [patent_app_number] => 7/709354 [patent_app_country] => US [patent_app_date] => 1991-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2193 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/204/05204279.pdf [firstpage_image] =>[orig_patent_app_number] => 709354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2859862 [patent_doc_number] => 05152805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-06 [patent_title] => 'M-I-M\' device and fabrication method' [patent_app_type] => 1 [patent_app_number] => 7/702254 [patent_app_country] => US [patent_app_date] => 1991-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 6599 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/152/05152805.pdf [firstpage_image] =>[orig_patent_app_number] => 702254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2787372 [patent_doc_number] => 05100824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-31 [patent_title] => 'Method of making small contactless RAM cell' [patent_app_type] => 1 [patent_app_number] => 7/701542 [patent_app_country] => US [patent_app_date] => 1991-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 12131 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/100/05100824.pdf [firstpage_image] =>[orig_patent_app_number] => 701542 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2845068 [patent_doc_number] => 05106776 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-21 [patent_title] => 'Method of making high performance composed pillar dRAM cell' [patent_app_type] => 1 [patent_app_number] => 7/700724 [patent_app_country] => US [patent_app_date] => 1991-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 31 [patent_no_of_words] => 7075 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/106/05106776.pdf [firstpage_image] =>[orig_patent_app_number] => 700724 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2703676 [patent_doc_number] => 05068199 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Method for anodizing a polysilicon layer lower capacitor plate of a DRAM to increase capacitance' [patent_app_type] => 1 [patent_app_number] => 7/696438 [patent_app_country] => US [patent_app_date] => 1991-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 3138 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068199.pdf [firstpage_image] =>[orig_patent_app_number] => 696438 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2787408 [patent_doc_number] => 05100826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-31 [patent_title] => 'Process for manufacturing ultra-dense dynamic random access memories using partially-disposable dielectric filler strips between wordlines' [patent_app_type] => 1 [patent_app_number] => 7/695182 [patent_app_country] => US [patent_app_date] => 1991-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 3738 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/100/05100826.pdf [firstpage_image] =>[orig_patent_app_number] => 695182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2822847 [patent_doc_number] => 05094971 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-10 [patent_title] => 'Method of manufacturing a read only semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/684938 [patent_app_country] => US [patent_app_date] => 1991-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 3736 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 469 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/094/05094971.pdf [firstpage_image] =>[orig_patent_app_number] => 684938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2974102 [patent_doc_number] => 05208175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-04 [patent_title] => 'Method of making a nonvolatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/692210 [patent_app_country] => US [patent_app_date] => 1991-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 3823 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/208/05208175.pdf [firstpage_image] =>[orig_patent_app_number] => 692210 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2915366 [patent_doc_number] => 05179034 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-12 [patent_title] => 'Method for fabricating insulated gate semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/683695 [patent_app_country] => US [patent_app_date] => 1991-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 3614 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/179/05179034.pdf [firstpage_image] =>[orig_patent_app_number] => 683695 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2898951 [patent_doc_number] => 05217915 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-08 [patent_title] => 'Method of making gate array base cell' [patent_app_type] => 1 [patent_app_number] => 7/681822 [patent_app_country] => US [patent_app_date] => 1991-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 42 [patent_no_of_words] => 6250 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/217/05217915.pdf [firstpage_image] =>[orig_patent_app_number] => 681822 [rel_patent_id] =>[rel_patent_doc_number] =>)