Search

Tom Thomas

Supervisory Patent Examiner (ID: 10930, Phone: (571)272-1664 , Office: P/2893 )

Most Active Art Unit
1104
Art Unit(s)
1104, 2893, 2899, 2811
Total Applications
746
Issued Applications
628
Pending Applications
6
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3474502 [patent_doc_number] => 05427972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'Method of making a sidewall contact' [patent_app_type] => 1 [patent_app_number] => 7/511818 [patent_app_country] => US [patent_app_date] => 1990-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 3220 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 397 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/427/05427972.pdf [firstpage_image] =>[orig_patent_app_number] => 511818 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/511818
Method of making a sidewall contact Apr 17, 1990 Issued
Array ( [id] => 2657954 [patent_doc_number] => 04978635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-18 [patent_title] => 'Method of making a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/507079 [patent_app_country] => US [patent_app_date] => 1990-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 6471 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/978/04978635.pdf [firstpage_image] =>[orig_patent_app_number] => 507079 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/507079
Method of making a semiconductor memory device Apr 8, 1990 Issued
Array ( [id] => 2757893 [patent_doc_number] => 05059548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Method of making a semiconductor memory device having a double stacked capacitor' [patent_app_type] => 1 [patent_app_number] => 7/503228 [patent_app_country] => US [patent_app_date] => 1990-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 30 [patent_no_of_words] => 4875 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/059/05059548.pdf [firstpage_image] =>[orig_patent_app_number] => 503228 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/503228
Method of making a semiconductor memory device having a double stacked capacitor Apr 1, 1990 Issued
Array ( [id] => 2822928 [patent_doc_number] => 05169792 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-08 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/502027 [patent_app_country] => US [patent_app_date] => 1990-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 29 [patent_no_of_words] => 4372 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/169/05169792.pdf [firstpage_image] =>[orig_patent_app_number] => 502027 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/502027
Semiconductor device Mar 29, 1990 Issued
Array ( [id] => 2976284 [patent_doc_number] => 05252507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-12 [patent_title] => 'Very high density wafer scale device architecture' [patent_app_type] => 1 [patent_app_number] => 7/502898 [patent_app_country] => US [patent_app_date] => 1990-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 18485 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/252/05252507.pdf [firstpage_image] =>[orig_patent_app_number] => 502898 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/502898
Very high density wafer scale device architecture Mar 29, 1990 Issued
Array ( [id] => 2866386 [patent_doc_number] => 05096845 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-17 [patent_title] => 'Method of making field effect transistors in an inner region of a hole' [patent_app_type] => 1 [patent_app_number] => 7/496714 [patent_app_country] => US [patent_app_date] => 1990-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 43 [patent_no_of_words] => 7712 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/096/05096845.pdf [firstpage_image] =>[orig_patent_app_number] => 496714 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/496714
Method of making field effect transistors in an inner region of a hole Mar 20, 1990 Issued
Array ( [id] => 2898992 [patent_doc_number] => 05217917 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-08 [patent_title] => 'Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor' [patent_app_type] => 1 [patent_app_number] => 7/496280 [patent_app_country] => US [patent_app_date] => 1990-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 130 [patent_figures_cnt] => 146 [patent_no_of_words] => 43562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/217/05217917.pdf [firstpage_image] =>[orig_patent_app_number] => 496280 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/496280
Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor Mar 19, 1990 Issued
Array ( [id] => 2881978 [patent_doc_number] => 05108941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Method of making metal-to-polysilicon capacitor' [patent_app_type] => 1 [patent_app_number] => 7/495870 [patent_app_country] => US [patent_app_date] => 1990-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3319 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/108/05108941.pdf [firstpage_image] =>[orig_patent_app_number] => 495870 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/495870
Method of making metal-to-polysilicon capacitor Mar 18, 1990 Issued
Array ( [id] => 2679847 [patent_doc_number] => 05066608 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Method of making a DRAM cell with stacked trench capacitor' [patent_app_type] => 1 [patent_app_number] => 7/494322 [patent_app_country] => US [patent_app_date] => 1990-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3328 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/066/05066608.pdf [firstpage_image] =>[orig_patent_app_number] => 494322 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/494322
Method of making a DRAM cell with stacked trench capacitor Mar 15, 1990 Issued
Array ( [id] => 2595954 [patent_doc_number] => 04975383 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-04 [patent_title] => 'Method for making an electrically erasable programmable read only memory cell having a three dimensional floating gate' [patent_app_type] => 1 [patent_app_number] => 7/496098 [patent_app_country] => US [patent_app_date] => 1990-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 2041 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/975/04975383.pdf [firstpage_image] =>[orig_patent_app_number] => 496098 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/496098
Method for making an electrically erasable programmable read only memory cell having a three dimensional floating gate Mar 14, 1990 Issued
Array ( [id] => 2664181 [patent_doc_number] => 04983226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-08 [patent_title] => 'Defect free trench isolation devices and method of fabrication' [patent_app_type] => 1 [patent_app_number] => 7/494811 [patent_app_country] => US [patent_app_date] => 1990-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2104 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/983/04983226.pdf [firstpage_image] =>[orig_patent_app_number] => 494811 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/494811
Defect free trench isolation devices and method of fabrication Mar 14, 1990 Issued
Array ( [id] => 2734681 [patent_doc_number] => 05077232 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-31 [patent_title] => 'Method of making stacked capacitor DRAM cells' [patent_app_type] => 1 [patent_app_number] => 7/489824 [patent_app_country] => US [patent_app_date] => 1990-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 2582 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/077/05077232.pdf [firstpage_image] =>[orig_patent_app_number] => 489824 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/489824
Method of making stacked capacitor DRAM cells Mar 8, 1990 Issued
07/489819 MANUFACTURING METHOD FOR A DRAM CELL Mar 8, 1990 Abandoned
Array ( [id] => 2866419 [patent_doc_number] => 05096847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-17 [patent_title] => 'Method making an ultra high density DRAM cell with stacked capacitor' [patent_app_type] => 1 [patent_app_number] => 7/489820 [patent_app_country] => US [patent_app_date] => 1990-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2523 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/096/05096847.pdf [firstpage_image] =>[orig_patent_app_number] => 489820 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/489820
Method making an ultra high density DRAM cell with stacked capacitor Mar 8, 1990 Issued
07/489803 PROCESS FOR MANUFACTURING A DRAM CELL Mar 7, 1990 Abandoned
Array ( [id] => 2703696 [patent_doc_number] => 05068200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Method of manufacturing DRAM cell' [patent_app_type] => 1 [patent_app_number] => 7/490326 [patent_app_country] => US [patent_app_date] => 1990-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2438 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068200.pdf [firstpage_image] =>[orig_patent_app_number] => 490326 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/490326
Method of manufacturing DRAM cell Mar 7, 1990 Issued
Array ( [id] => 2588969 [patent_doc_number] => 04970173 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => 'Method of making high voltage vertical field effect transistor with improved safe operating area' [patent_app_type] => 1 [patent_app_number] => 7/489853 [patent_app_country] => US [patent_app_date] => 1990-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3285 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970173.pdf [firstpage_image] =>[orig_patent_app_number] => 489853 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/489853
Method of making high voltage vertical field effect transistor with improved safe operating area Mar 1, 1990 Issued
Array ( [id] => 2765440 [patent_doc_number] => 05006480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-09 [patent_title] => 'Metal gate capacitor fabricated with a silicon gate MOS process' [patent_app_type] => 1 [patent_app_number] => 7/479557 [patent_app_country] => US [patent_app_date] => 1990-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3751 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/006/05006480.pdf [firstpage_image] =>[orig_patent_app_number] => 479557 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/479557
Metal gate capacitor fabricated with a silicon gate MOS process Feb 12, 1990 Issued
Array ( [id] => 2679868 [patent_doc_number] => 05066609 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Method of manufacturing a semiconductor device including a trench capacitor' [patent_app_type] => 1 [patent_app_number] => 7/469055 [patent_app_country] => US [patent_app_date] => 1990-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2120 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/066/05066609.pdf [firstpage_image] =>[orig_patent_app_number] => 469055 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/469055
Method of manufacturing a semiconductor device including a trench capacitor Jan 22, 1990 Issued
Array ( [id] => 2744971 [patent_doc_number] => 04987091 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-22 [patent_title] => 'Process of fabricating dynamic random access memory cell' [patent_app_type] => 1 [patent_app_number] => 7/468212 [patent_app_country] => US [patent_app_date] => 1990-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 3724 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/987/04987091.pdf [firstpage_image] =>[orig_patent_app_number] => 468212 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/468212
Process of fabricating dynamic random access memory cell Jan 21, 1990 Issued
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