Tom Thomas

Array ( [id] => 2587776 [patent_doc_number] => 04927779 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-22 [patent_title] => 'Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell and fabrication process therefor' [patent_app_type] => 1 [patent_app_number] => 7/428159 [patent_app_country] => US [patent_app_date] => 1989-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2377 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/927/04927779.pdf [firstpage_image] =>[orig_patent_app_number] => 428159 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2625533 [patent_doc_number] => 04920065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-24 [patent_title] => 'Method of making ultra dense dram cells' [patent_app_type] => 1 [patent_app_number] => 7/428100 [patent_app_country] => US [patent_app_date] => 1989-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5602 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/920/04920065.pdf [firstpage_image] =>[orig_patent_app_number] => 428100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2563564 [patent_doc_number] => 04945068 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-31 [patent_title] => 'Manufacturing method of semiconductor nonvolatile memory device' [patent_app_type] => 1 [patent_app_number] => 7/426230 [patent_app_country] => US [patent_app_date] => 1989-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3778 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/945/04945068.pdf [firstpage_image] =>[orig_patent_app_number] => 426230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2626313 [patent_doc_number] => 04966867 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-30 [patent_title] => 'Process for forming self-aligned, metal-semiconductor contacts in integrated MISFET structures' [patent_app_type] => 1 [patent_app_number] => 7/424446 [patent_app_country] => US [patent_app_date] => 1989-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1498 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/966/04966867.pdf [firstpage_image] =>[orig_patent_app_number] => 424446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2632186 [patent_doc_number] => 04957881 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-18 [patent_title] => 'Formation of self-aligned contacts' [patent_app_type] => 1 [patent_app_number] => 7/424450 [patent_app_country] => US [patent_app_date] => 1989-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 1979 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/957/04957881.pdf [firstpage_image] =>[orig_patent_app_number] => 424450 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2556561 [patent_doc_number] => 04960726 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-02 [patent_title] => 'BiCMOS process' [patent_app_type] => 1 [patent_app_number] => 7/424363 [patent_app_country] => US [patent_app_date] => 1989-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2924 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/960/04960726.pdf [firstpage_image] =>[orig_patent_app_number] => 424363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2705274 [patent_doc_number] => 05001081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide' [patent_app_type] => 1 [patent_app_number] => 7/418946 [patent_app_country] => US [patent_app_date] => 1989-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 2890 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001081.pdf [firstpage_image] =>[orig_patent_app_number] => 418946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2586340 [patent_doc_number] => 04963502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-16 [patent_title] => 'Method of making oxide-isolated source/drain transistor' [patent_app_type] => 1 [patent_app_number] => 7/416566 [patent_app_country] => US [patent_app_date] => 1989-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5805 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/963/04963502.pdf [firstpage_image] =>[orig_patent_app_number] => 416566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2630866 [patent_doc_number] => 04937203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-26 [patent_title] => 'Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer' [patent_app_type] => 1 [patent_app_number] => 7/414895 [patent_app_country] => US [patent_app_date] => 1989-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4555 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/937/04937203.pdf [firstpage_image] =>[orig_patent_app_number] => 414895 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2644923 [patent_doc_number] => 04980310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-25 [patent_title] => 'Method of making a trench dram cell' [patent_app_type] => 1 [patent_app_number] => 7/412742 [patent_app_country] => US [patent_app_date] => 1989-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2035 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/980/04980310.pdf [firstpage_image] =>[orig_patent_app_number] => 412742 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2679753 [patent_doc_number] => 05066603 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Method of manufacturing static induction transistors' [patent_app_type] => 1 [patent_app_number] => 7/403621 [patent_app_country] => US [patent_app_date] => 1989-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2647 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/066/05066603.pdf [firstpage_image] =>[orig_patent_app_number] => 403621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2705927 [patent_doc_number] => 05013679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Cell capacitor of a dynamic random access memory and a method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 7/403292 [patent_app_country] => US [patent_app_date] => 1989-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 52 [patent_no_of_words] => 5902 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/013/05013679.pdf [firstpage_image] =>[orig_patent_app_number] => 403292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2700621 [patent_doc_number] => 04981529 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-01 [patent_title] => 'Semiconductor substrate provided with marks for alignment even under a resist film' [patent_app_type] => 1 [patent_app_number] => 7/399399 [patent_app_country] => US [patent_app_date] => 1989-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 27 [patent_no_of_words] => 4004 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/981/04981529.pdf [firstpage_image] =>[orig_patent_app_number] => 399399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2824634 [patent_doc_number] => 05116775 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Method of producing semiconductor memory device with buried barrier layer' [patent_app_type] => 1 [patent_app_number] => 7/396686 [patent_app_country] => US [patent_app_date] => 1989-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4728 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/116/05116775.pdf [firstpage_image] =>[orig_patent_app_number] => 396686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2669083 [patent_doc_number] => 04999312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-12 [patent_title] => 'Doping method using an oxide film and a nitride film on the trench wall to manufacture a semiconductor device and the manufactured device' [patent_app_type] => 1 [patent_app_number] => 7/394380 [patent_app_country] => US [patent_app_date] => 1989-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 3889 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 451 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/999/04999312.pdf [firstpage_image] =>[orig_patent_app_number] => 394380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2668116 [patent_doc_number] => 05047362 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Method of making large-scale EPROM memory with a checker board pattern and an improved coupling factor' [patent_app_type] => 1 [patent_app_number] => 7/392699 [patent_app_country] => US [patent_app_date] => 1989-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3238 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047362.pdf [firstpage_image] =>[orig_patent_app_number] => 392699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2705219 [patent_doc_number] => 05001078 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Method of making semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/389417 [patent_app_country] => US [patent_app_date] => 1989-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5335 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001078.pdf [firstpage_image] =>[orig_patent_app_number] => 389417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2704884 [patent_doc_number] => 04992394 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-12 [patent_title] => 'Self aligned registration marks for integrated circuit fabrication' [patent_app_type] => 1 [patent_app_number] => 7/387721 [patent_app_country] => US [patent_app_date] => 1989-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3062 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/992/04992394.pdf [firstpage_image] =>[orig_patent_app_number] => 387721 [rel_patent_id] =>[rel_patent_doc_number] =>)